| Message ID | 20250218132356.1809075-3-rrichter@amd.com |
|---|---|
| State | New |
| Headers | show |
| Series | cxl: Address translation support, part 2: Generic support and AMD Zen5 platform enablement | expand |
On 2/18/25 6:23 AM, Robert Richter wrote: > To enable address translation, the endpoint's HPA range must be > translated to each of the parent port's address ranges up to the root > decoder. Traverse the decoder and port hierarchy from the endpoint up > to the root port and apply platform specific translation functions to > determine the next HPA range of the parent port where needed: > > if (cxl_port->to_hpa) > hpa = cxl_port->to_hpa(cxl_decoder, hpa) > > The root port's HPA range is equivalent to the system's SPA range. > > Introduce a callback to translate an HPA range from a port to its > parent. > > Signed-off-by: Robert Richter <rrichter@amd.com> > Reviewed-by: Gregory Price <gourry@gourry.net> > --- > drivers/cxl/cxl.h | 11 +++++++++++ > 1 file changed, 11 insertions(+) With such a small change, I would fold this into the patch where you are using it. > > diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h > index b19ba47242c6..17496784f021 100644 > --- a/drivers/cxl/cxl.h > +++ b/drivers/cxl/cxl.h > @@ -418,6 +418,15 @@ struct cxl_switch_decoder { > struct cxl_dport *target[]; > }; > > +/** > + * cxl_to_hpa_fn - type of a callback function to translate an HPA > + * @cxld: cxl_decoder to translate from > + * @hpa: HPA of the @cxld decoder's address range > + * > + * The callback translates a decoder's HPA to the next upper domain > + * which is the address range of the decoder's parent port. The return > + * value is the translated HPA on success or ULLONG_MAX otherwise. > + */ > typedef u64 (*cxl_to_hpa_fn)(struct cxl_decoder *cxld, u64 hpa); > > /** > @@ -581,6 +590,7 @@ struct cxl_dax_region { > * @parent_dport: dport that points to this port in the parent > * @decoder_ida: allocator for decoder ids > * @reg_map: component and ras register mapping parameters > + * @to_hpa: Callback to translate a child port's decoder address to the port's HPA address range > * @nr_dports: number of entries in @dports > * @hdm_end: track last allocated HDM decoder instance for allocation ordering > * @commit_end: cursor to track highest committed decoder for commit ordering > @@ -602,6 +612,7 @@ struct cxl_port { > struct cxl_dport *parent_dport; > struct ida decoder_ida; > struct cxl_register_map reg_map; > + cxl_to_hpa_fn to_hpa; > int nr_dports; > int hdm_end; > int commit_end;
diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h index b19ba47242c6..17496784f021 100644 --- a/drivers/cxl/cxl.h +++ b/drivers/cxl/cxl.h @@ -418,6 +418,15 @@ struct cxl_switch_decoder { struct cxl_dport *target[]; }; +/** + * cxl_to_hpa_fn - type of a callback function to translate an HPA + * @cxld: cxl_decoder to translate from + * @hpa: HPA of the @cxld decoder's address range + * + * The callback translates a decoder's HPA to the next upper domain + * which is the address range of the decoder's parent port. The return + * value is the translated HPA on success or ULLONG_MAX otherwise. + */ typedef u64 (*cxl_to_hpa_fn)(struct cxl_decoder *cxld, u64 hpa); /** @@ -581,6 +590,7 @@ struct cxl_dax_region { * @parent_dport: dport that points to this port in the parent * @decoder_ida: allocator for decoder ids * @reg_map: component and ras register mapping parameters + * @to_hpa: Callback to translate a child port's decoder address to the port's HPA address range * @nr_dports: number of entries in @dports * @hdm_end: track last allocated HDM decoder instance for allocation ordering * @commit_end: cursor to track highest committed decoder for commit ordering @@ -602,6 +612,7 @@ struct cxl_port { struct cxl_dport *parent_dport; struct ida decoder_ida; struct cxl_register_map reg_map; + cxl_to_hpa_fn to_hpa; int nr_dports; int hdm_end; int commit_end;
To enable address translation, the endpoint's HPA range must be translated to each of the parent port's address ranges up to the root decoder. Traverse the decoder and port hierarchy from the endpoint up to the root port and apply platform specific translation functions to determine the next HPA range of the parent port where needed: if (cxl_port->to_hpa) hpa = cxl_port->to_hpa(cxl_decoder, hpa) The root port's HPA range is equivalent to the system's SPA range. Introduce a callback to translate an HPA range from a port to its parent. Signed-off-by: Robert Richter <rrichter@amd.com> Reviewed-by: Gregory Price <gourry@gourry.net> --- drivers/cxl/cxl.h | 11 +++++++++++ 1 file changed, 11 insertions(+)