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client-ip=165.204.84.17; helo=SATLEXMB03.amd.com; pr=C Received: from SATLEXMB03.amd.com (165.204.84.17) by BL02EPF00021F6E.mail.protection.outlook.com (10.167.249.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.8655.12 via Frontend Transport; Thu, 17 Apr 2025 21:30:05 +0000 Received: from SATLEXMB03.amd.com (10.181.40.144) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Thu, 17 Apr 2025 16:30:04 -0500 Received: from xcbalucerop40x.xilinx.com (10.180.168.240) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39 via Frontend Transport; Thu, 17 Apr 2025 16:30:03 -0500 From: To: , , , , , , , , CC: Alejandro Lucero , Zhi Wang , "Jonathan Cameron" , Ben Cheatham Subject: [PATCH v14 19/22] cxl: add region flag for precluding a device memory to be used for dax Date: Thu, 17 Apr 2025 22:29:22 +0100 Message-ID: <20250417212926.1343268-20-alejandro.lucero-palau@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250417212926.1343268-1-alejandro.lucero-palau@amd.com> References: <20250417212926.1343268-1-alejandro.lucero-palau@amd.com> Precedence: bulk X-Mailing-List: linux-cxl@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Received-SPF: None (SATLEXMB03.amd.com: alejandro.lucero-palau@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF00021F6E:EE_|PH0PR12MB5647:EE_ X-MS-Office365-Filtering-Correlation-Id: 7d16cc36-ec4f-47d0-26a8-08dd7df7053d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|376014|82310400026|36860700013|1800799024; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Apr 2025 21:30:05.4327 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7d16cc36-ec4f-47d0-26a8-08dd7df7053d X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF00021F6E.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR12MB5647 From: Alejandro Lucero By definition a type2 cxl device will use the host managed memory for specific functionality, therefore it should not be available to other uses. However, a dax interface could be just good enough in some cases. Add a flag to a cxl region for specifically state to not create a dax device. Allow a Type2 driver to set that flag at region creation time. Signed-off-by: Alejandro Lucero Reviewed-by: Zhi Wang Reviewed-by: Jonathan Cameron Reviewed-by: Ben Cheatham Reviewed-by: Dave Jiang --- drivers/cxl/core/region.c | 10 +++++++++- drivers/cxl/cxl.h | 3 +++ include/cxl/cxl.h | 3 ++- 3 files changed, 14 insertions(+), 2 deletions(-) diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c index f55fb253ecde..cec168a26efb 100644 --- a/drivers/cxl/core/region.c +++ b/drivers/cxl/core/region.c @@ -3649,12 +3649,14 @@ __construct_new_region(struct cxl_root_decoder *cxlrd, * @cxlrd: root decoder to allocate HPA * @cxled: endpoint decoder with reserved DPA capacity * @ways: interleave ways required + * @no_dax: if true no DAX device should be created * * Returns a fully formed region in the commit state and attached to the * cxl_region driver. */ struct cxl_region *cxl_create_region(struct cxl_root_decoder *cxlrd, - struct cxl_endpoint_decoder *cxled, int ways) + struct cxl_endpoint_decoder *cxled, int ways, + bool no_dax) { struct cxl_region *cxlr; @@ -3670,6 +3672,9 @@ struct cxl_region *cxl_create_region(struct cxl_root_decoder *cxlrd, return ERR_PTR(-ENODEV); } + if (no_dax) + set_bit(CXL_REGION_F_NO_DAX, &cxlr->flags); + return cxlr; } EXPORT_SYMBOL_NS_GPL(cxl_create_region, "CXL"); @@ -3833,6 +3838,9 @@ static int cxl_region_probe(struct device *dev) if (rc) return rc; + if (test_bit(CXL_REGION_F_NO_DAX, &cxlr->flags)) + return 0; + switch (cxlr->mode) { case CXL_PARTMODE_PMEM: return devm_cxl_add_pmem_region(cxlr); diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h index c35620c24c8f..2eb927c9229c 100644 --- a/drivers/cxl/cxl.h +++ b/drivers/cxl/cxl.h @@ -405,6 +405,9 @@ struct cxl_region_params { */ #define CXL_REGION_F_NEEDS_RESET 1 +/* Allow Type2 drivers to specify if a dax region should not be created. */ +#define CXL_REGION_F_NO_DAX 2 + /** * struct cxl_region - CXL region * @dev: This region's device diff --git a/include/cxl/cxl.h b/include/cxl/cxl.h index ca8dd6aed455..5d30d775966b 100644 --- a/include/cxl/cxl.h +++ b/include/cxl/cxl.h @@ -267,7 +267,8 @@ struct cxl_endpoint_decoder *cxl_request_dpa(struct cxl_memdev *cxlmd, resource_size_t alloc); int cxl_dpa_free(struct cxl_endpoint_decoder *cxled); struct cxl_region *cxl_create_region(struct cxl_root_decoder *cxlrd, - struct cxl_endpoint_decoder *cxled, int ways); + struct cxl_endpoint_decoder *cxled, int ways, + bool no_dax); int cxl_accel_region_detach(struct cxl_endpoint_decoder *cxled); #endif /* __CXL_CXL_H__ */