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[GIT,PULL] Compute Express Link (CXL) Fixes for 6.13-rc4

Message ID 6762e48637297_2bb90329432@iweiny-mobl.notmuch
State New
Headers show
Series [GIT,PULL] Compute Express Link (CXL) Fixes for 6.13-rc4 | expand

Pull-request

https://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl.git tags/cxl-fixes-6.13-rc4

Message

Ira Weiny Dec. 18, 2024, 3:04 p.m. UTC
Hi Linus, please pull from:

  https://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl.git tags/cxl-fixes-6.13-rc4

... to get 3 fixes for the CXL tree.  I'm submitting these for Dave Jiang
as he is out on vacation.

The fixes include; a fix for device probe, a sysfs issue on CXL 1.1
devices, and fixing region creation on greater than 4 way switches.

They have been soaking in linux-next since Dec 12th.

Thank you,
Ira Weiny


---

The following changes since commit fac04efc5c793dccbd07e2d59af9f90b7fc0dca4:

  Linux 6.13-rc2 (2024-12-08 14:03:39 -0800)

are available in the Git repository at:

  https://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl.git tags/cxl-fixes-6.13-rc4

for you to fetch changes up to 76467a94810c2aa4dd3096903291ac6df30c399e:

  cxl/region: Fix region creation for greater than x2 switches (2024-12-10 14:50:34 -0700)

----------------------------------------------------------------
cxl fixes for v613-rc4

	- prevent probe failure when non-critical ras unmasking fails
	- fix CXL 1.1 link status sysfs attribute
	- fix 4 way (and greater) switch interleave region creation

----------------------------------------------------------------
Davidlohr Bueso (1):
      cxl/pci: Fix potential bogus return value upon successful probing

Huaisheng Ye (1):
      cxl/region: Fix region creation for greater than x2 switches

Li Ming (1):
      cxl/pci: Check dport->regs.rcd_pcie_cap availability before accessing

 drivers/cxl/core/region.c | 25 ++++++++++++++++++-------
 drivers/cxl/pci.c         |  6 ++++--
 2 files changed, 22 insertions(+), 9 deletions(-)