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Mon, 13 Aug 2018 09:59:11 +0000 Received-SPF: None (protection.outlook.com: amd.com does not designate permitted sender hosts) Received: from SATLEXCHOV02.amd.com (165.204.84.17) by CO1NAM03FT058.mail.protection.outlook.com (10.152.81.107) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.20.1059.14 via Frontend Transport; Mon, 13 Aug 2018 09:59:10 +0000 Received: from hr-intel.amd.com (10.34.1.3) by SATLEXCHOV02.amd.com (10.181.40.72) with Microsoft SMTP Server id 14.3.389.1; Mon, 13 Aug 2018 04:59:09 -0500 From: Huang Rui To: , Subject: [PATCH v3 0/5] drm/ttm,amdgpu: Introduce LRU bulk move functionality Date: Mon, 13 Aug 2018 17:58:46 +0800 Message-ID: <1534154331-11810-1-git-send-email-ray.huang@amd.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:165.204.84.17; IPV:NLI; CTRY:US; EFV:NLI; SFV:NSPM; SFS:(10009020)(376002)(346002)(396003)(136003)(39860400002)(2980300002)(428003)(189003)(199004)(77096007)(81166006)(336012)(81156014)(478600001)(97736004)(7696005)(14444005)(8676002)(476003)(23676004)(86362001)(486006)(2616005)(2906002)(426003)(104016004)(105586002)(186003)(110136005)(26005)(36756003)(316002)(126002)(5820100001)(450100002)(50226002)(4326008)(72206003)(8936002)(53416004)(106466001)(68736007)(561944003)(47776003)(2870700001)(50466002)(6666003)(53936002)(356003)(5660300001)(305945005)(142933001); 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MWHPR1201MB2511; 20:1vjbsiCnMm15fKkc/yssW+igAClPR7VMLcTFc9wR3+PmEwaBqbCd0V8G5rKE80VnFz4dJiDBMLhWznq7b2vs1KPL/0vlx8hBpudiMcdqc8c8tTkRn+MTkwKmRnOJQ+QnTMeSjwH4xYiGzsNUtgAXs54T8xeOuaaEF5msj5A6E9s6TGyz8hGAohP+XezDqqWkeo/PgSBjuVX4JtZn+xFavhZwSLMwEBCrquuIAZ0hvcQfn/cHfVlFzYsFkU8TjW2v X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Aug 2018 09:59:10.8550 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 841f8248-f95d-4672-058c-08d601036af9 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXCHOV02.amd.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR1201MB2511 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Huang Rui Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP The idea and proposal is originally from Christian, and I continue to work to deliver it. Background: amdgpu driver will move all PD/PT and PerVM BOs into idle list. Then move all of them on the end of LRU list one by one. Thus, that cause so many BOs moved to the end of the LRU, and impact performance seriously. Then Christian provided a workaround to not move PD/PT BOs on LRU with below patch: "drm/amdgpu: band aid validating VM PTs" Commit 0bbf32026cf5ba41e9922b30e26e1bed1ecd38ae However, the final solution should bulk move all PD/PT and PerVM BOs on the LRU instead of one by one. Whenever amdgpu_vm_validate_pt_bos() is called and we have BOs which need to be validated we move all BOs together to the end of the LRU without dropping the lock for the LRU. While doing so we note the beginning and end of this block in the LRU list. Now when amdgpu_vm_validate_pt_bos() is called and we don't have anything to do, we don't move every BO one by one, but instead cut the LRU list into pieces so that we bulk move everything to the end in just one operation. Test data: +--------------+-----------------+-----------+---------------------------------------+ | |The Talos |Clpeak(OCL)|BusSpeedReadback(OCL) | | |Principle(Vulkan)| | | +------------------------------------------------------------------------------------+ | | | |0.319 ms(1k) 0.314 ms(2K) 0.308 ms(4K) | | Original | 147.7 FPS | 76.86 us |0.307 ms(8K) 0.310 ms(16K) | +------------------------------------------------------------------------------------+ | Orignial + WA| | |0.254 ms(1K) 0.241 ms(2K) | |(don't move | 162.1 FPS | 42.15 us |0.230 ms(4K) 0.223 ms(8K) 0.204 ms(16K)| |PT BOs on LRU)| | | | +------------------------------------------------------------------------------------+ | Bulk move | 163.1 FPS | 40.52 us |0.244 ms(1K) 0.252 ms(2K) 0.213 ms(4K) | | | | |0.214 ms(8K) 0.225 ms(16K) | +--------------+-----------------+-----------+---------------------------------------+ After test them with above three benchmarks include vulkan and opencl. We can see the visible improvement than original, and even better than original with workaround. Changes from V1 -> V2: - Fix to missed the BOs in relocated/moved that should be also moved to the end of LRU. Changes from V2 -> V3: - Remove unused parameter and use list_for_each_entry instead of the one with save entry. Thanks, Rui Christian König (2): drm/ttm: add helper structures for bulk moves on lru list drm/ttm: revise ttm_bo_move_to_lru_tail to support bulk moves Huang Rui (3): drm/ttm: add bulk move function on LRU drm/amdgpu: use bulk moves for efficient VM LRU handling (v3) drm/amdgpu: move PD/PT bos on LRU again drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 75 ++++++++++++++++++++++++-------- drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 4 ++ drivers/gpu/drm/ttm/ttm_bo.c | 78 +++++++++++++++++++++++++++++++++- include/drm/ttm/ttm_bo_api.h | 16 ++++++- include/drm/ttm/ttm_bo_driver.h | 28 ++++++++++++ 5 files changed, 182 insertions(+), 19 deletions(-) Tested-by: Dieter Nützel