From patchwork Mon Jan 10 12:55:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajeev Nandan X-Patchwork-Id: 12711041 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 48778C433F5 for ; Wed, 12 Jan 2022 08:51:53 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 13A5A112E36; Wed, 12 Jan 2022 08:51:43 +0000 (UTC) Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) by gabe.freedesktop.org (Postfix) with ESMTPS id 80E8511B4C7; Mon, 10 Jan 2022 12:56:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1641819370; x=1673355370; h=from:to:cc:subject:date:message-id; bh=3Bk1/0hmaEKsEsqhTNPZn9424JbvOsw1HmScJhy+Q5Y=; b=EVbvtrjHVshcZjXXd2PEHgACNszUJkvNxY/iFt/gfguDPrYLNSMxQ/0Y ylQJLG6dOmVhY6G/cmg6ZqGXaY0Woj4jOIygqmjdLd+QzR8S+R9caXJy8 SPBtvoJm+bn752P4FriptdR0EnhgoAJ5KaMpB5DVlCpqEZPYpLjyQ+W2G I=; Received: from ironmsg-lv-alpha.qualcomm.com ([10.47.202.13]) by alexa-out.qualcomm.com with ESMTP; 10 Jan 2022 04:56:10 -0800 X-QCInternal: smtphost Received: from ironmsg02-blr.qualcomm.com ([10.86.208.131]) by ironmsg-lv-alpha.qualcomm.com with ESMTP/TLS/AES256-SHA; 10 Jan 2022 04:56:09 -0800 X-QCInternal: smtphost Received: from rajeevny-linux.qualcomm.com ([10.204.66.121]) by ironmsg02-blr.qualcomm.com with ESMTP; 10 Jan 2022 18:25:45 +0530 Received: by rajeevny-linux.qualcomm.com (Postfix, from userid 2363605) id EE593219EE; Mon, 10 Jan 2022 18:25:43 +0530 (IST) From: Rajeev Nandan To: dri-devel@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org Subject: [v2 0/3] drm/msm/dsi: Add 10nm dsi phy tuning configuration support Date: Mon, 10 Jan 2022 18:25:34 +0530 Message-Id: <1641819337-17037-1-git-send-email-quic_rajeevny@quicinc.com> X-Mailer: git-send-email 2.7.4 X-Mailman-Approved-At: Wed, 12 Jan 2022 08:51:42 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: quic_kalyant@quicinc.com, jonathan@marek.ca, airlied@linux.ie, Rajeev Nandan , linux-kernel@vger.kernel.org, quic_abhinavk@quicinc.com, robh+dt@kernel.org, quic_mkrishn@quicinc.com, dmitry.baryshkov@linaro.org, swboyd@chromium.org, sean@poorly.run Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" This series is to add DSI PHY tuning support in Qualcomm Snapdragon SoCs with 10nm DSI PHY e.g. SC7180 In most cases the default values of DSI PHY tuning registers should be sufficient as they are fully optimized. However, in some cases (for example, where extreme board parasitics cause the eye shape to degrade), the override bits can be used to improve the signal quality. Different DSI PHY versions have different configurations to adjust the drive strength, drive level, de-emphasis, etc. The current series has only those configuration options supported by 10nm PHY, e.g. drive strength and drive level. The number of registers to configure the drive strength are different for 7nm PHY. The design can be extended to other DSI PHY versions if required, as each PHY version can have its callback to get the input from DT and prepare register values. Changes in v2: - Addressed dt-bindings comments (Stephen Boyd, Dmitry Baryshkov) - Split into generic code and 10nm-specific part (Dmitry Baryshkov) - Fix the backward compatibility (Dmitry Baryshkov) Rajeev Nandan (3): dt-bindings: msm/dsi: Add 10nm dsi phy tuning properties drm/msm/dsi: Add dsi phy tuning configuration support drm/msm/dsi: Add 10nm dsi phy tuning configuration support .../bindings/display/msm/dsi-phy-10nm.yaml | 33 ++++++++++++++ drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 3 ++ drivers/gpu/drm/msm/dsi/phy/dsi_phy.h | 16 +++++++ drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c | 51 +++++++++++++++++++--- 4 files changed, 97 insertions(+), 6 deletions(-)