From patchwork Wed May 17 22:01:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kuogee Hsieh X-Patchwork-Id: 13245764 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0A8E3C77B7A for ; Wed, 17 May 2023 22:02:18 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2C62A10E2C1; Wed, 17 May 2023 22:02:17 +0000 (UTC) Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by gabe.freedesktop.org (Postfix) with ESMTPS id 56D7C10E2C4; Wed, 17 May 2023 22:02:15 +0000 (UTC) Received: from pps.filterd (m0279869.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 34HJrlfo008378; Wed, 17 May 2023 22:02:09 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : mime-version : content-type; s=qcppdkim1; bh=V+fu4Jl8nxExO64zchEbC+xXtgYj1oQi3VWPVEjVrwY=; b=BhESeyQSPNEdgl04p2Hg0ODhCNU4f3klLpDMBHpLox9IFwT5HRBj7cMPsGwsv57LOI4A 3OAary26hfHpKoVFd/hDLBhyKU9a6KFUCl79HsigEMLrEhktIhLChToTOEcS4kcsSotv FruNG2kPMqwXpzzOiwMR0eEkqpERhcV1An+XkQJXA46751XmOpX9uAEm+Lze4nATvGCX mLPuVq3Q8TjIBLr4Townbhxx7fK2wYbQZK+zFyrZ+Hw0HB2AruBvhHX/nsLl4LcwPoC5 pLHv0kvUDEiH6rfaqO4t0R20hGbnE7o4IXFst/aQ2zzmwY8OHLTPgfzRX2zBmPrbmBOw HA== Received: from nalasppmta03.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3qmxyp18q5-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 17 May 2023 22:02:09 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 34HM287P031232 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 17 May 2023 22:02:08 GMT Received: from khsieh-linux1.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 17 May 2023 15:02:07 -0700 From: Kuogee Hsieh To: , , , , , , , , , , Subject: [PATCH v10 0/8] add DSC 1.2 dpu supports Date: Wed, 17 May 2023 15:01:51 -0700 Message-ID: <1684360919-28458-1-git-send-email-quic_khsieh@quicinc.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: O5jZi0gNylFxMjWydkg-wLPWZU6qP8kM X-Proofpoint-GUID: O5jZi0gNylFxMjWydkg-wLPWZU6qP8kM X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-05-17_04,2023-05-17_02,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=949 priorityscore=1501 impostorscore=0 suspectscore=0 mlxscore=0 bulkscore=0 adultscore=0 lowpriorityscore=0 spamscore=0 clxscore=1015 malwarescore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2304280000 definitions=main-2305170181 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: quic_sbillaka@quicinc.com, linux-arm-msm@vger.kernel.org, quic_abhinavk@quicinc.com, Kuogee Hsieh , marijn.suijten@somainline.org, quic_jesszhan@quicinc.com, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" This series adds the DPU side changes to support DSC 1.2 encoder. This was validated with both DSI DSC 1.2 panel and DP DSC 1.2 monitor. The DSI and DP parts will be pushed later on top of this change. This seriel is rebase on [1], [2] and catalog fixes from rev-4 of [3]. [1]: https://patchwork.freedesktop.org/series/116851/ [2]: https://patchwork.freedesktop.org/series/116615/ [3]: https://patchwork.freedesktop.org/series/112332/ Abhinav Kumar (2): drm/msm/dpu: add dsc blocks to the catalog of MSM8998 and SC8180X drm/msm/dpu: add DSC 1.2 hw blocks for relevant chipsets Kuogee Hsieh (6): drm/msm/dpu: add DPU_PINGPONG_DSC feature bit for DPU < 7.0.0 drm/msm/dpu: Guard PINGPONG DSC ops behind DPU_PINGPONG_DSC bit drm/msm/dpu: Introduce PINGPONG_NONE to disconnect DSC from PINGPONG drm/msm/dpu: add support for DSC encoder v1.2 engine drm/msm/dpu: separate DSC flush update out of interface drm/msm/dpu: tear down DSC data path when DSC disabled drivers/gpu/drm/msm/Makefile | 1 + .../drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h | 7 + .../drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h | 11 + .../gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h | 14 + .../gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h | 7 + .../drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h | 16 + .../gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h | 14 + .../gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h | 14 + drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 51 ++- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 29 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 35 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 29 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h | 13 + drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c | 14 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.h | 15 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc_1_2.c | 386 +++++++++++++++++++++ drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h | 3 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 9 +- drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 7 +- 19 files changed, 646 insertions(+), 29 deletions(-) create mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc_1_2.c