From patchwork Sat Dec 1 00:52:46 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matthias Kaehlcke X-Patchwork-Id: 10707473 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id ADD8E14DB for ; Sat, 1 Dec 2018 00:53:29 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A07742F4E4 for ; Sat, 1 Dec 2018 00:53:29 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 945CC2F5CE; Sat, 1 Dec 2018 00:53:29 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 3E4C72F4E4 for ; Sat, 1 Dec 2018 00:53:29 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 284656E6BB; Sat, 1 Dec 2018 00:53:26 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-pf1-x442.google.com (mail-pf1-x442.google.com [IPv6:2607:f8b0:4864:20::442]) by gabe.freedesktop.org (Postfix) with ESMTPS id 05B7489A4E for ; Sat, 1 Dec 2018 00:53:24 +0000 (UTC) Received: by mail-pf1-x442.google.com with SMTP id z9so3611241pfi.2 for ; Fri, 30 Nov 2018 16:53:24 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=YxMkbstJjYz/SCOIKptS3dJ1kb5LfIKu8uvA4n0XIFU=; b=dIcYGhuUz41i2KdK916GmL2Epw4hiLTVceYlXKDFx7gUhFltiLBnD+S7ctbWKU72C3 jl+UIHLuGARBMSEff2Ad9/jFaO0nBOhG1LsqrvDAPkGJGVgrHaIoeielMVwrj+lFcDir 1q4q2sdED6alGyvG7Cts07zn/7lEAfMkx/sayv9ls6lcMx6v/yuXQcR5BjUGwX7g+nz/ NSwUBi7zaFqgcP88bRqZETfXjBsiQ9Pilivx4wrQcvEvp6QzhXAwRXlL/EZopX4BJwTe +5VAG2qA4j+xbWARisLj+yAcfze/fbP0SiyjwpR2Sn5HEYqJNEaBMmoDuV9vgZmhj277 cOTQ== X-Gm-Message-State: AA+aEWb6+zEi8U+3n8vYs+Sq7QKt4Kvc8UhleSagho+gP1yj6klQbPbY HB95y3tRgt2kUyzqY/kWAtxE8g== X-Google-Smtp-Source: AFSGD/XfMCuzU5aCKP/5KCwKKSx0NCbpn9/5HnkpRatuRUEjkVhIoToh/CCHQTlkRFctydOCuaUEjg== X-Received: by 2002:a62:2c81:: with SMTP id s123mr7573110pfs.174.1543625604513; Fri, 30 Nov 2018 16:53:24 -0800 (PST) Received: from mka.mtv.corp.google.com ([2620:15c:202:1:b6af:f85:ed6c:ac6a]) by smtp.gmail.com with ESMTPSA id z8sm16518566pgz.53.2018.11.30.16.53.23 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 30 Nov 2018 16:53:23 -0800 (PST) From: Matthias Kaehlcke To: Rob Clark , David Airlie , Rob Herring , Mark Rutland , Andy Gross , David Brown Subject: [PATCH v3 0/8] drm/msm/dsi: Get PHY ref clocks from the DT Date: Fri, 30 Nov 2018 16:52:46 -0800 Message-Id: <20181201005254.139908-1-mka@chromium.org> X-Mailer: git-send-email 2.20.0.rc1.387.gf8505762e3-goog MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Rajesh Yadav , linux-arm-msm@vger.kernel.org, Douglas Anderson , dri-devel@lists.freedesktop.org, Stephen Boyd , Matthias Kaehlcke , Sean Paul , freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP The MSM DSI PHY drivers currently hardcode the name and the rate of the PHY ref clock. Get the ref clock from the device tree instead. Note: testing of this series was limited to SDM845 and the 10nm PHY Major changes in v3: - keep supporting DTs without ref clock for the 28nm and the 28nm 8960 PHYs - added patch to add ref clock to qcom-apq8064.dtsi Major changes in v2: - apply to all MSM DSI PHY drivers, not only 10nm Matthias Kaehlcke (8): dt-bindings: msm/dsi: Add ref clock for PHYs drm/msm/dsi: 28nm 8960 PHY: Get ref clock from the DT drm/msm/dsi: 28nm PHY: Get ref clock from the DT drm/msm/dsi: 14nm PHY: Get ref clock from the DT drm/msm/dsi: 10nm PHY: Get ref clock from the DT arm64: dts: qcom: msm8916: Set 'xo_board' as ref clock of the DSI PHY arm64: dts: sdm845: Set 'bi_tcxo' as ref clock of the DSI PHYs ARM: dts: qcom-apq8064: Set 'xo_board' as ref clock of the DSI PHY .../devicetree/bindings/display/msm/dsi.txt | 1 + arch/arm/boot/dts/qcom-apq8064.dtsi | 5 +-- arch/arm64/boot/dts/qcom/msm8916.dtsi | 5 +-- arch/arm64/boot/dts/qcom/sdm845.dtsi | 10 +++--- drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c | 13 ++++++- drivers/gpu/drm/msm/dsi/pll/dsi_pll_14nm.c | 16 +++++++-- drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.c | 35 ++++++++++++++----- .../gpu/drm/msm/dsi/pll/dsi_pll_28nm_8960.c | 28 ++++++++++++--- 8 files changed, 87 insertions(+), 26 deletions(-)