From patchwork Tue Dec 4 22:42:26 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matthias Kaehlcke X-Patchwork-Id: 10712655 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E380713BF for ; Tue, 4 Dec 2018 22:43:17 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D34DD2BF93 for ; Tue, 4 Dec 2018 22:43:17 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C390E2BFBC; Tue, 4 Dec 2018 22:43:17 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 754122BF93 for ; Tue, 4 Dec 2018 22:43:17 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 765D16E14A; Tue, 4 Dec 2018 22:43:14 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-pl1-x642.google.com (mail-pl1-x642.google.com [IPv6:2607:f8b0:4864:20::642]) by gabe.freedesktop.org (Postfix) with ESMTPS id 441456E14A for ; Tue, 4 Dec 2018 22:43:13 +0000 (UTC) Received: by mail-pl1-x642.google.com with SMTP id w4so9027593plz.1 for ; Tue, 04 Dec 2018 14:43:13 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=jbz+AWlhcCUXrpU2bSN/CZ8Hj20Pq4BqCxgPZZFepsA=; b=uRi2XONsr+RnDkLepPAk+3z4G8bkgbhA0shL7hziKfDYRmeCQfH92Jf/xxRVu7aDHJ cV7T5SdmOEMSgDSRH81bjtEXfcA5ICnQlrE0TA3+DqhcBLHI8P/d8CqFRSrMFXoSx9xw gF+GT6Ws7cCn/RyBwm1qZRBmE+COnySE97vxp1V0uSYVNE9f96IUxl9jkAXVO3DTa/wa Vb8VYgb6qoNZJeh2muZoeGVLy/7q0AmJ063zTn40mDYSJwbEUgCobJtmgWKjqudEtiUp iqILN0R+5zYwanmaAA6X4fwm8s34vFIcy1P0wLD4Cp//GbKI9hJN0l2WAeHnXakpFsDq GGZw== X-Gm-Message-State: AA+aEWYpTllbqXp4vVd0kc4bJr5poep91CWQk39OTu2wAGI4n+NQnRO0 fhA2ZO+ouoKTmzj1hCJPb0rCSw== X-Google-Smtp-Source: AFSGD/U87YsN0vGxhb58rI9jVZ+TVIPoJHy2c289I8dgHLlWBPK51rotC9BD6hL/KisPQHG3zkAftQ== X-Received: by 2002:a17:902:aa82:: with SMTP id d2mr13227136plr.153.1543963392845; Tue, 04 Dec 2018 14:43:12 -0800 (PST) Received: from mka.mtv.corp.google.com ([2620:15c:202:1:b6af:f85:ed6c:ac6a]) by smtp.gmail.com with ESMTPSA id y184sm21961917pgd.71.2018.12.04.14.43.11 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 04 Dec 2018 14:43:12 -0800 (PST) From: Matthias Kaehlcke To: Rob Clark , David Airlie , Rob Herring , Mark Rutland , Andy Gross , David Brown Subject: [PATCH v4 0/8] drm/msm/dsi: Get PHY ref clocks from the DT Date: Tue, 4 Dec 2018 14:42:26 -0800 Message-Id: <20181204224234.62619-1-mka@chromium.org> X-Mailer: git-send-email 2.20.0.rc1.387.gf8505762e3-goog MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Rajesh Yadav , linux-arm-msm@vger.kernel.org, Douglas Anderson , dri-devel@lists.freedesktop.org, Stephen Boyd , Matthias Kaehlcke , Sean Paul , freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP The MSM DSI PHY drivers currently hardcode the name and the rate of the PHY ref clock. Get the ref clock from the device tree instead. Note: testing of this series was limited to SDM845 and the 10nm PHY Major changes in v4: - always use parent rate for 28nm and 28nm 8960 PHYs Major changes in v3: - keep supporting DTs without ref clock for the 28nm and the 28nm 8960 PHYs - added patch to add ref clock to qcom-apq8064.dtsi Major changes in v2: - apply to all MSM DSI PHY drivers, not only 10nm Matthias Kaehlcke (8): dt-bindings: msm/dsi: Add ref clock for PHYs drm/msm/dsi: 28nm 8960 PHY: Get ref clock from the DT drm/msm/dsi: 28nm PHY: Get ref clock from the DT drm/msm/dsi: 14nm PHY: Get ref clock from the DT drm/msm/dsi: 10nm PHY: Get ref clock from the DT arm64: dts: qcom: msm8916: Set 'xo_board' as ref clock of the DSI PHY arm64: dts: sdm845: Set 'bi_tcxo' as ref clock of the DSI PHYs ARM: dts: qcom-apq8064: Set 'xo_board' as ref clock of the DSI PHY .../devicetree/bindings/display/msm/dsi.txt | 1 + arch/arm/boot/dts/qcom-apq8064.dtsi | 5 +-- arch/arm64/boot/dts/qcom/msm8916.dtsi | 5 +-- arch/arm64/boot/dts/qcom/sdm845.dtsi | 10 +++--- drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c | 13 ++++++- drivers/gpu/drm/msm/dsi/pll/dsi_pll_14nm.c | 16 +++++++-- drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.c | 36 +++++++++++++------ .../gpu/drm/msm/dsi/pll/dsi_pll_28nm_8960.c | 24 ++++++++++--- 8 files changed, 82 insertions(+), 28 deletions(-)