From patchwork Wed Dec 19 23:55:20 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matthias Kaehlcke X-Patchwork-Id: 10738309 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 84A101399 for ; Wed, 19 Dec 2018 23:55:45 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 74F3E28882 for ; Wed, 19 Dec 2018 23:55:45 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6695E288B9; Wed, 19 Dec 2018 23:55:45 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 1CAF8288AC for ; Wed, 19 Dec 2018 23:55:45 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 38B166F1ED; Wed, 19 Dec 2018 23:55:42 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-pf1-f193.google.com (mail-pf1-f193.google.com [209.85.210.193]) by gabe.freedesktop.org (Postfix) with ESMTPS id A67DB6F1EE for ; Wed, 19 Dec 2018 23:55:41 +0000 (UTC) Received: by mail-pf1-f193.google.com with SMTP id q1so10582487pfi.5 for ; Wed, 19 Dec 2018 15:55:41 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=XyIMYAL5qBnmvWOCPA7vcQI2SfJsc96HrX1N6dGqLOs=; b=mabFUUfqOcoatOQUovQmZ+bR1+Kf5zdcvbm4INVZRF77HV6opDPLeoNJBsJdV10+oU xIB1xd7zXwEdh3hVC2beGhyrgTo+cioqC14IA5u6/L07GTinzdO6JBD8Ogr5VDY/5uMj GjZ9E6NUsBaZ7vZ6B/a0boUTXUi2xHLMqzdMQSgZEdRBJDu6Tn91E81S0NEpl2/YZ3es ZEGD8oYq3foDieBVRWQ4BJjdF6EXpgbWeQRJDA2csIT2Dw+TGQ47n7lmIUIxyvuZyBmr 8kMgjPBxFXxH3P0IroKQkncyWuYLxXQJLz2jH5WwN2WUup/pHayasvV2l425lxLYZtNF rhmw== X-Gm-Message-State: AA+aEWYNyFDPRSh/8PCkvxt0QVyAyCmkf7d+dBZYQiGO1hrXOrDTTyrS 6MFzGbS8dwNqLoYManAd4KcQmA== X-Google-Smtp-Source: AFSGD/VjxWZjGtpglJs4TWeaHZHEP8v/rEMIDMx+k0M8YWsuPuAaRzBXbgN6Wkm7JXO4CFTZcWgDWA== X-Received: by 2002:a63:b24a:: with SMTP id t10mr19772542pgo.223.1545263740904; Wed, 19 Dec 2018 15:55:40 -0800 (PST) Received: from mka.mtv.corp.google.com ([2620:15c:202:1:75a:3f6e:21d:9374]) by smtp.gmail.com with ESMTPSA id t67sm37045048pfd.90.2018.12.19.15.55.39 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 19 Dec 2018 15:55:39 -0800 (PST) From: Matthias Kaehlcke To: Rob Clark , David Airlie , Rob Herring , Mark Rutland , Andy Gross , David Brown Subject: [PATCH v5 0/8] drm/msm/dsi: Get PHY ref clocks from the DT Date: Wed, 19 Dec 2018 15:55:20 -0800 Message-Id: <20181219235528.114830-1-mka@chromium.org> X-Mailer: git-send-email 2.20.1.415.g653613c723-goog MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Rajesh Yadav , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Douglas Anderson , Matthias Kaehlcke , Sean Paul , Stephen Boyd , freedreno@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP The MSM DSI PHY drivers currently hardcode the name and the rate of the PHY ref clock. Get the ref clock from the device tree instead. Note: testing of this series was limited to SDM845 and the 10nm PHY Major changes in v5: - none (see per-patch change log for minor changes) Major changes in v4: - always use parent rate for 28nm and 28nm 8960 PHYs Major changes in v3: - keep supporting DTs without ref clock for the 28nm and the 28nm 8960 PHYs - added patch to add ref clock to qcom-apq8064.dtsi Major changes in v2: - apply to all MSM DSI PHY drivers, not only 10nm Matthias Kaehlcke (8): dt-bindings: msm/dsi: Add ref clock for PHYs drm/msm/dsi: 28nm 8960 PHY: Get ref clock from the DT drm/msm/dsi: 28nm PHY: Get ref clock from the DT drm/msm/dsi: 14nm PHY: Get ref clock from the DT drm/msm/dsi: 10nm PHY: Get ref clock from the DT arm64: dts: qcom: msm8916: Set 'xo_board' as ref clock of the DSI PHY arm64: dts: sdm845: Set 'bi_tcxo' as ref clock of the DSI PHYs ARM: dts: qcom-apq8064: Set 'xo_board' as ref clock of the DSI PHY .../devicetree/bindings/display/msm/dsi.txt | 1 + arch/arm/boot/dts/qcom-apq8064.dtsi | 5 +-- arch/arm64/boot/dts/qcom/msm8916.dtsi | 5 +-- arch/arm64/boot/dts/qcom/sdm845.dtsi | 10 +++--- drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c | 20 +++++++++-- drivers/gpu/drm/msm/dsi/pll/dsi_pll_14nm.c | 23 +++++++++--- drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.c | 36 +++++++++++++------ .../gpu/drm/msm/dsi/pll/dsi_pll_28nm_8960.c | 24 ++++++++++--- 8 files changed, 92 insertions(+), 32 deletions(-)