Message ID | 20191030192431.5798-1-mikita.lipski@amd.com (mailing list archive) |
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Headers | show
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Wed, 30 Oct 2019 14:24:33 -0500 From: <mikita.lipski@amd.com> To: <amd-gfx@lists.freedesktop.org> Subject: [PATCH v4 00/13] DSC MST support for AMDGPU Date: Wed, 30 Oct 2019 15:24:18 -0400 Message-ID: <20191030192431.5798-1-mikita.lipski@amd.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:165.204.84.17; IPV:NLI; CTRY:US; EFV:NLI; SFV:NSPM; SFS:(10009020)(4636009)(346002)(376002)(136003)(39860400002)(396003)(428003)(199004)(189003)(70206006)(305945005)(48376002)(2876002)(47776003)(5660300002)(50466002)(70586007)(53416004)(1076003)(2906002)(51416003)(2616005)(36756003)(8676002)(356004)(6666004)(7696005)(86362001)(476003)(126002)(2351001)(81166006)(26005)(6916009)(426003)(8936002)(50226002)(54906003)(4326008)(478600001)(186003)(316002)(14444005)(81156014)(486006)(336012)(16586007)(16060500001); DIR:OUT; SFP:1101; SCL:1; SRVR:BY5PR12MB4146; H:SATLEXMB01.amd.com; FPR:; SPF:None; LANG:en; PTR:InfoDomainNonexistent; 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DSC MST support for AMDGPU
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From: Mikita Lipski <mikita.lipski@amd.com> This set of patches is a continuation of DSC enablement patches for AMDGPU. This set enables DSC on MST. It also contains implementation of both encoder and connector atomic check routines. First 10 patches have been introduced in multiple iterations to the mailing list before. These patches were developed by David Francis as part of his work on DSC. Other 3 patches add atomic check functionality to encoder and connector to allocate and release VCPI slots on each state atomic check. These changes utilize newly added drm_mst_helper functions for better tracking of VCPI slots. v2: squashed previously 3 separate atomic check patches, separate atomic check for dsc connectors, track vcpi and pbn on connectors. v3: Moved modeset trigger on affected MST displays to DRM v4: Fix warnings, use current mode's bpc rather than display's maximum capable one David Francis (10): drm/dp_mst: Add PBN calculation for DSC modes drm/dp_mst: Parse FEC capability on MST ports drm/dp_mst: Add MST support to DP DPCD R/W functions drm/dp_mst: Fill branch->num_ports drm/dp_mst: Add helpers for MST DSC and virtual DPCD aux drm/amd/display: Initialize DSC PPS variables to 0 drm/amd/display: Validate DSC caps on MST endpoints drm/amd/display: Write DSC enable to MST DPCD drm/amd/display: MST DSC compute fair share drm/dp_mst: Add new quirk for Synaptics MST hubs Mikita Lipski (3): drm/amd/display: Add MST atomic routines drm/dp_mst: Add DSC enablement helpers to DRM drm/amd/display: Recalculate VCPI slots for new DSC connectors .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 109 ++++- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 5 + .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 70 ++- .../display/amdgpu_dm/amdgpu_dm_mst_types.c | 449 +++++++++++++++++- .../display/amdgpu_dm/amdgpu_dm_mst_types.h | 4 + .../drm/amd/display/dc/core/dc_link_hwss.c | 3 + .../gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c | 3 + .../drm/amd/display/dc/dcn20/dcn20_resource.c | 7 +- .../drm/amd/display/dc/dcn20/dcn20_resource.h | 1 + drivers/gpu/drm/drm_dp_aux_dev.c | 12 +- drivers/gpu/drm/drm_dp_helper.c | 33 +- drivers/gpu/drm/drm_dp_mst_topology.c | 277 ++++++++++- drivers/gpu/drm/i915/display/intel_dp_mst.c | 3 +- drivers/gpu/drm/nouveau/dispnv50/disp.c | 3 +- drivers/gpu/drm/radeon/radeon_dp_mst.c | 2 +- include/drm/drm_dp_helper.h | 7 + include/drm/drm_dp_mst_helper.h | 12 +- 17 files changed, 925 insertions(+), 75 deletions(-)