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Sat, 16 Nov 2019 16:01:30 -0600 From: To: Subject: [PATCH v7 00/17] DSC MST support for DRM and AMDGPU Date: Sat, 16 Nov 2019 17:01:11 -0500 Message-ID: <20191116220128.16598-1-mikita.lipski@amd.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:165.204.84.17; IPV:NLI; CTRY:US; EFV:NLI; SFV:NSPM; SFS:(10009020)(4636009)(376002)(136003)(39860400002)(396003)(346002)(428003)(189003)(199004)(53416004)(70586007)(2906002)(47776003)(81156014)(81166006)(70206006)(8676002)(356004)(6666004)(50226002)(2876002)(8936002)(1076003)(6916009)(486006)(2616005)(126002)(476003)(336012)(26005)(426003)(7696005)(51416003)(186003)(5660300002)(478600001)(50466002)(48376002)(14444005)(4326008)(305945005)(86362001)(36756003)(16586007)(316002)(54906003)(2351001)(63370400001)(16060500001); DIR:OUT; SFP:1101; SCL:1; SRVR:DM5PR1201MB2552; H:SATLEXMB02.amd.com; FPR:; SPF:None; LANG:en; PTR:InfoDomainNonexistent; MX:1; A:3; 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Ip=[165.204.84.17]; Helo=[SATLEXMB02.amd.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR1201MB2552 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amdcloud.onmicrosoft.com; s=selector2-amdcloud-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=CAYNxOnyzH6qFx4+yokhIpnQyKg7L05s06t7ATwH82E=; b=FHGl71ejdv3yuAGJwP8UDYMGW0cPXWYCNgEN4slUOwFOW4V2ZdB91K7VJR7VA7ZIohE7lSwOa0N9lQ/J2kSTQ3hdsuwUmqkHQpIABR0Z5P5bBrHsReUK7kr0NvcJrhY6EYzdgaoJqDKoz7xtgPMbo0BqZzjxhMTLidu2NOK0bqo= X-Mailman-Original-Authentication-Results: spf=none (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; lists.freedesktop.org; dkim=none (message not signed) header.d=none;lists.freedesktop.org; dmarc=temperror action=none header.from=amd.com; X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mikita Lipski , dri-devel@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Mikita Lipski Patches are based of amd-staging-drm-next, the follow up set of patches will be sent for drm-tip This set of patches is a continuation of DSC enablement patches for AMDGPU. This set enables DSC on MST. It also contains implementation of both encoder and connector atomic check routines. These patches have been introduced in multiple iterations to the mailing list before. These patches were developed by David Francis as part of his work on DSC. v2: squashed previously 3 separate atomic check patches, separate atomic check for dsc connectors, track vcpi and pbn on connectors. v3: Moved modeset trigger on affected MST displays to DRM v4: Fix warnings, use current mode's bpc rather than display's maximum capable one v5: Moving branch's bandwidth validation to DRM, Added function to enable DSC per port in DRM v6: Compute fair share uses DRM helper for BW validation v7: Add helper to overwrite PBN divider per slot, Add helper function to trigger modeset on affected DSC connectors in DRM David Francis (9): drm/dp_mst: Add PBN calculation for DSC modes drm/dp_mst: Parse FEC capability on MST ports drm/dp_mst: Add MST support to DP DPCD R/W functions drm/dp_mst: Fill branch->num_ports drm/dp_mst: Add helpers for MST DSC and virtual DPCD aux drm/amd/display: Initialize DSC PPS variables to 0 drm/amd/display: Validate DSC caps on MST endpoints drm/amd/display: Write DSC enable to MST DPCD drm/amd/display: MST DSC compute fair share drm/dp_mst: Add new quirk for Synaptics MST hubs Mikita Lipski (8): drm/dp_mst: Manually overwrite PBN divider for calculating timeslots drm/dp_mst: Add DSC enablement helpers to DRM drm/dp_mst: Add branch bandwidth validation to MST atomic check drm/dp_mst: Add helper to trigger modeset on affected DSC MST CRTCs drm/amd/display: Add PBN per slot calculation for DSC drm/amd/display: Recalculate VCPI slots for new DSC connectors drm/amd/display: Trigger modesets on MST DSC connectors .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 117 ++++- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 1 + .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 19 +- .../display/amdgpu_dm/amdgpu_dm_mst_types.c | 395 ++++++++++++++++- .../display/amdgpu_dm/amdgpu_dm_mst_types.h | 5 + .../drm/amd/display/dc/core/dc_link_hwss.c | 3 + .../gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c | 3 + .../drm/amd/display/dc/dcn20/dcn20_resource.c | 7 +- .../drm/amd/display/dc/dcn20/dcn20_resource.h | 1 + drivers/gpu/drm/drm_dp_aux_dev.c | 12 +- drivers/gpu/drm/drm_dp_helper.c | 33 +- drivers/gpu/drm/drm_dp_mst_topology.c | 401 +++++++++++++++++- drivers/gpu/drm/i915/display/intel_dp_mst.c | 5 +- drivers/gpu/drm/nouveau/dispnv50/disp.c | 6 +- drivers/gpu/drm/radeon/radeon_dp_mst.c | 2 +- include/drm/drm_dp_helper.h | 7 + include/drm/drm_dp_mst_helper.h | 19 +- 17 files changed, 989 insertions(+), 47 deletions(-)