From patchwork Mon Nov 18 20:02:18 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 11251069 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 34D63138C for ; Tue, 19 Nov 2019 08:05:50 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1DAE0222EF for ; Tue, 19 Nov 2019 08:05:50 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1DAE0222EF Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E4FD06EBD9; Tue, 19 Nov 2019 08:04:36 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lj1-x231.google.com (mail-lj1-x231.google.com [IPv6:2a00:1450:4864:20::231]) by gabe.freedesktop.org (Postfix) with ESMTPS id D0C7A6E81F for ; Mon, 18 Nov 2019 20:05:30 +0000 (UTC) Received: by mail-lj1-x231.google.com with SMTP id g3so20409122ljl.11 for ; Mon, 18 Nov 2019 12:05:30 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=+lYduyo7vPgxp45RLwsY0ZnQLiYVsuFTry8aLXbx4kM=; b=HKSasDqBRd0Xnx09NhMaSOSAQ5KBHqdhRfsK4yPH/OgVqpma7x9FEbl7h1RBT2QgHS IN0xohcd3XgFK3YKiqSQcMb0gyMfle1WTk0cL74KDjELxmkN9OzIy2fJWXZuotcT6UU+ 8RkHjEDAH4iPx35Xxebg5lBoky3YYtagXULijBu7x/vig7W+CMFDNmEX4HWwDZ0rNO0X SZB7wkt/gLr+Y2tRjt3qgwka2nMfW8Mjfpi68xriM7c7fRYHSQiXSbYNV6V3EblPJMIa XVkaNibgmL1BsRbtYOSe1/T6lD0mgwXjgFfJd7Se/yOn1ZFTfIQL7oPTc0pWaDr+sZDg K/3A== X-Gm-Message-State: APjAAAWWHUP9wvMkTZg85KkNXcGyobcV92APDRbe4k4ZOSODmFu29roq PvNr5H1fPNE6DmYX5WT/yzI= X-Google-Smtp-Source: APXvYqxptZWcgvS7sdySo1sH5FxDJRVUucG9P8wDoJrg5exzZstUPyRLwr6nfSCBfGL7tbiFLrJUzA== X-Received: by 2002:a2e:574d:: with SMTP id r13mr934150ljd.10.1574107529313; Mon, 18 Nov 2019 12:05:29 -0800 (PST) Received: from localhost.localdomain (79-139-233-37.dynamic.spd-mgts.ru. [79.139.233.37]) by smtp.gmail.com with ESMTPSA id j23sm9166942lji.41.2019.11.18.12.05.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 Nov 2019 12:05:28 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , Mikko Perttunen , Georgi Djakov , Rob Herring Subject: [PATCH v1 00/29] Introduce memory interconnect for NVIDIA Tegra SoCs Date: Mon, 18 Nov 2019 23:02:18 +0300 Message-Id: <20191118200247.3567-1-digetx@gmail.com> X-Mailer: git-send-email 2.23.0 MIME-Version: 1.0 X-Mailman-Approved-At: Tue, 19 Nov 2019 08:04:07 +0000 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=+lYduyo7vPgxp45RLwsY0ZnQLiYVsuFTry8aLXbx4kM=; b=APzSWzS1AWv0t0oARIksAL9UGz8A49gKk4636qenUrw+Td8W04Iz2y8qkPl3AHCr6m l/Y7ReHNWM+fX2S6YoWckzLWIag7992BEYqUq4Gn7ppw4+46i/FfNOopAHsAijIGhjKR tD7SA9PLTVi2s4wgrPZldc+6eFwRb93c5lbw3Ix93bgb7lhuXJ0PlExD9gV/yxANzVju ztDiniGHZn5D2BJ4iYP8hDynklw+eD4ahvr9rBJ6wzY3kA2s+pBf2hpwaxyTKPUB/KNS oCMyalrSMkpWiyay05T2MnJa3wwN2B5WySinWwolMDf4wTAKiDFgGzlR2428ByxDD+/O jcJw== X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Hello, This series brings initial support for memory interconnect to Tegra20, Terga30 and Tegra124 SoCs. The interconnect provides are quite generic and should be suitable for all Tegra SoCs, but currently upstream kernel has EMC/MC drivers only for those three generations of Tegra SoCs. For the start only display controllers are getting interconnect API support, others could be supported later on. The display controllers have the biggest demand for interconnect API right now because dynamic memory frequency scaling can't be done safely without taking into account bandwidth requirement from the displays. Dmitry Osipenko (29): dt-bindings: memory: tegra20: mc: Document new interconnect property dt-bindings: memory: tegra20: emc: Document new interconnect property dt-bindings: memory: tegra30: mc: Document new interconnect property dt-bindings: memory: tegra30: emc: Document new interconnect property dt-bindings: memory: tegra124: mc: Document new interconnect property dt-bindings: memory: tegra124: emc: Document new interconnect property dt-bindings: host1x: Document new interconnect properties dt-bindings: interconnect: tegra: Add initial IDs ARM: tegra: Add interconnect properties to Tegra20 device-tree ARM: tegra: Add interconnect properties to Tegra30 device-tree ARM: tegra: Add interconnect properties to Tegra124 device-tree interconnect: Add memory interconnection providers for NVIDIA Tegra SoCs memory: tegra: Register as interconnect provider memory: tegra: Add interconnect nodes for Terga20 display controllers memory: tegra: Add interconnect nodes for Terga30 display controllers memory: tegra: Add interconnect nodes for Terga124 display controllers memory: tegra20-emc: Use devm_platform_ioremap_resource memory: tegra20-emc: Continue probing if timings/IRQ are missing in device-tree memory: tegra20-emc: Register as interconnect provider memory: tegra30-emc: Continue probing if timings are missing in device-tree memory: tegra30-emc: Register as interconnect provider memory: tegra124-emc: Use devm_platform_ioremap_resource memory: tegra124-emc: Register as interconnect provider drm/tegra: dc: Use devm_platform_ioremap_resource drm/tegra: dc: Release PM and RGB output when client's registration fails drm/tegra: dc: Support memory bandwidth management ARM: tegra: Enable interconnect API in tegra_defconfig ARM: multi_v7_defconfig: Enable NVIDIA Tegra interconnect providers MAINTAINERS: Add maintainers for NVIDIA Tegra interconnect drivers .../display/tegra/nvidia,tegra20-host1x.txt | 67 +++++ .../nvidia,tegra124-emc.txt | 3 + .../nvidia,tegra124-mc.yaml | 5 + .../memory-controllers/nvidia,tegra20-emc.txt | 4 + .../memory-controllers/nvidia,tegra20-mc.txt | 4 + .../nvidia,tegra30-emc.yaml | 6 + .../memory-controllers/nvidia,tegra30-mc.yaml | 5 + MAINTAINERS | 9 + arch/arm/boot/dts/tegra124.dtsi | 10 + arch/arm/boot/dts/tegra20.dtsi | 11 +- arch/arm/boot/dts/tegra30.dtsi | 12 +- arch/arm/configs/multi_v7_defconfig | 2 + arch/arm/configs/tegra_defconfig | 2 + drivers/gpu/drm/tegra/dc.c | 252 +++++++++++++++++- drivers/gpu/drm/tegra/dc.h | 8 + drivers/gpu/drm/tegra/drm.c | 18 ++ drivers/gpu/drm/tegra/plane.c | 1 + drivers/gpu/drm/tegra/plane.h | 4 +- drivers/interconnect/Kconfig | 1 + drivers/interconnect/Makefile | 1 + drivers/interconnect/tegra/Kconfig | 6 + drivers/interconnect/tegra/Makefile | 4 + drivers/interconnect/tegra/tegra-icc-emc.c | 138 ++++++++++ drivers/interconnect/tegra/tegra-icc-mc.c | 130 +++++++++ drivers/memory/tegra/mc.c | 4 + drivers/memory/tegra/tegra124-emc.c | 28 +- drivers/memory/tegra/tegra124.c | 16 ++ drivers/memory/tegra/tegra20-emc.c | 91 ++++--- drivers/memory/tegra/tegra20.c | 14 + drivers/memory/tegra/tegra30-emc.c | 34 ++- drivers/memory/tegra/tegra30.c | 14 + include/dt-bindings/interconnect/tegra-icc.h | 11 + include/soc/tegra/mc.h | 26 ++ 33 files changed, 883 insertions(+), 58 deletions(-) create mode 100644 drivers/interconnect/tegra/Kconfig create mode 100644 drivers/interconnect/tegra/Makefile create mode 100644 drivers/interconnect/tegra/tegra-icc-emc.c create mode 100644 drivers/interconnect/tegra/tegra-icc-mc.c create mode 100644 include/dt-bindings/interconnect/tegra-icc.h