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[v9,00/18] DSC MST support for DRM and AMDGPU

Message ID 20191213200854.31545-1-mikita.lipski@amd.com (mailing list archive)
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Series DSC MST support for DRM and AMDGPU | expand

Message

Lipski, Mikita Dec. 13, 2019, 8:08 p.m. UTC
From: Mikita Lipski <mikita.lipski@amd.com>


This set of patches is a continuation of DSC enablement
patches for AMDGPU. This set enables DSC on MST. It also
contains implementation of both encoder and connector
atomic check routines.

These patches have been introduced in multiple
iterations to the mailing list before. These patches were
developed by David Francis as part of his work on DSC.

v2: squashed previously 3 separate atomic check patches,
separate atomic check for dsc connectors, track vcpi and
pbn on connectors.

v3: Moved modeset trigger on affected MST displays to DRM

v4: Fix warnings, use current mode's bpc rather than display's
maximum capable one

v5: Moving branch's bandwidth validation to DRM,
Added function to enable DSC per port in DRM

v6: Compute fair share uses DRM helper for BW validation

v7: Add helper to overwrite PBN divider per slot,
    Add helper function to trigger modeset on affected DSC connectors
in DRM

v8: Rebased on top of the MST refactor patches that were on DRM-tip
    Some cosmetic and cleanup changes

v9: - PBN calculation updated (preventing flooring the remainder)
	together with selftest
    - Move branch->num_ports deprecator to port unlink function
    - Added capability check for MST DSC capable sinks connected
	directly to GPU, also removed Lyude's reviewed-by since the
	functionality has changed in patch: "drm/dp_mst: Add helpers for
	MST DSC and virtual DPCD aux"
    - Renaming of drm_dp_mst_atomic_check_topology_state
    - Bug fixes after testing with MST DSC capable sink
    - More state and sanity checks added 
    - Typos fix and indentation fixes 

David Francis (9):
  drm/dp_mst: Add PBN calculation for DSC modes
  drm/dp_mst: Parse FEC capability on MST ports
  drm/dp_mst: Add MST support to DP DPCD R/W functions
  drm/dp_mst: Fill branch->num_ports
  drm/dp_mst: Add helpers for MST DSC and virtual DPCD aux
  drm/amd/display: Initialize DSC PPS variables to 0
  drm/amd/display: Validate DSC caps on MST endpoints
  drm/amd/display: Write DSC enable to MST DPCD
  drm/amd/display: MST DSC compute fair share

Mikita Lipski (9):
  drm/dp_mst: Add new quirk for Synaptics MST hubs
  drm/dp_mst: Manually overwrite PBN divider for calculating timeslots
  drm/dp_mst: Add DSC enablement helpers to DRM
  drm/dp_mst: Add branch bandwidth validation to MST atomic check
  drm/dp_mst: Rename drm_dp_mst_atomic_check_topology_state
  drm/amd/display: Add PBN per slot calculation for DSC
  drm/amd/display: Recalculate VCPI slots for new DSC connectors
  drm/dp_mst: Add helper to trigger modeset on affected DSC MST CRTCs
  drm/amd/display: Trigger modesets on MST DSC connectors

 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 117 ++++-
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h |   1 +
 .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c |  19 +-
 .../display/amdgpu_dm/amdgpu_dm_mst_types.c   | 399 +++++++++++++++++-
 .../display/amdgpu_dm/amdgpu_dm_mst_types.h   |   5 +
 .../drm/amd/display/dc/core/dc_link_hwss.c    |   3 +
 .../gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c  |   3 +
 .../drm/amd/display/dc/dcn20/dcn20_resource.c |   7 +-
 .../drm/amd/display/dc/dcn20/dcn20_resource.h |   1 +
 drivers/gpu/drm/drm_dp_aux_dev.c              |  12 +-
 drivers/gpu/drm/drm_dp_helper.c               |  32 +-
 drivers/gpu/drm/drm_dp_mst_topology.c         | 389 ++++++++++++++++-
 drivers/gpu/drm/i915/display/intel_dp_mst.c   |   5 +-
 drivers/gpu/drm/nouveau/dispnv50/disp.c       |   5 +-
 drivers/gpu/drm/radeon/radeon_dp_mst.c        |   2 +-
 .../drm/selftests/test-drm_dp_mst_helper.c    |  10 +-
 include/drm/drm_dp_helper.h                   |   7 +
 include/drm/drm_dp_mst_helper.h               |  20 +-
 18 files changed, 986 insertions(+), 51 deletions(-)