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[v11,00/10] Introduce memory interconnect for NVIDIA Tegra SoCs

Message ID 20201203192439.16177-1-digetx@gmail.com (mailing list archive)
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Series Introduce memory interconnect for NVIDIA Tegra SoCs | expand

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Dmitry Osipenko Dec. 3, 2020, 7:24 p.m. UTC
This series brings initial support for memory interconnect to Tegra20,
Tegra30 and Tegra124 SoCs.

For the starter only display controllers and devfreq devices are getting
interconnect API support, others could be supported later on. The display
controllers have the biggest demand for interconnect API right now because
dynamic memory frequency scaling can't be done safely without taking into
account bandwidth requirement from the displays. In particular this series
fixes distorted display output on T30 Ouya and T124 TK1 devices.

Changelog:

v11: - Added acks from Georgi Djakov.

     - CC'ed devicetree@vger.kernel.org in order to make the dt-bindings
       patch ("Document opp-supported-hw property") visible to the DT
       maintainers.

     - Rebased on a recent linux-next, note that some of v10 DT patches
       were already applied by Thierry into tegra tree, as well as one
       devfreq patch which removed the older tegra20-devfreq driver was
       applied by Chanwoo Choi to the devfreq tree.

     - Note that patch "memory: tegra20: Support hardware versioning and
       clean up OPP table initialization" fixes the noisy (but harmless)
       warning which happens because DT patches were applied before the
       code changes. This problem was spotted in current linux-next by
       Jonathan Hunter, hence could be worthwhile to pick up this patch
       for the v5.11.

v10 - In a longer run it will be much nicer if we could support EMC
      hardware versioning on Tegra20 and it's not late to support it now.
      Hence I added these new patches:

        dt-bindings: memory: tegra20: emc: Document opp-supported-hw property
        memory: tegra20: Support hardware versioning and clean up OPP table initialization

    - Removed error message from tegra30-devfreq driver about missing OPP
      properties in a device-tree because EMC driver already prints that
      message and it uses OPP API error code instead of checking DT directly,
      which is a more correct way of doing that.

v9: - Squashed "memory: tegra30-emc: Factor out clk initialization" into
      patch "tegra30: Support interconnect framework".
      Suggested by Krzysztof Kozlowski.

    - Improved Kconfig in the patch "memory: tegra124-emc: Make driver modular"
      by adding CONFIG_TEGRA124_CLK_EMC entry, which makes clk-driver changes
      to look a bit more cleaner. Suggested by Krzysztof Kozlowski.

    - Dropped voltage regulator support from ICC and DT patches for now
      because there is a new discussion about using a power domain abstraction
      for controlling the regulator, which is likely to happen.

    - Replaced direct "operating-points-v2" property checking in EMC drivers
      with checking of a returned error code from dev_pm_opp_of_add_table().
      Note that I haven't touched T20 EMC driver because it's very likely
      that we'll replace that code with a common helper soon anyways.
      Suggested by Viresh Kumar.

    - The T30 DT patches now include EMC OPP changes for Ouya board, which
      is available now in linux-next.

Dmitry Osipenko (10):
  dt-bindings: memory: tegra20: emc: Document opp-supported-hw property
  memory: tegra20: Support hardware versioning and clean up OPP table
    initialization
  memory: tegra30: Support interconnect framework
  memory: tegra124-emc: Make driver modular
  memory: tegra124-emc: Continue probing if timings are missing in
    device-tree
  memory: tegra124: Support interconnect framework
  drm/tegra: dc: Support memory bandwidth management
  drm/tegra: dc: Extend debug stats with total number of events
  PM / devfreq: tegra30: Support interconnect and OPPs from device-tree
  PM / devfreq: tegra30: Separate configurations per-SoC generation

 .../memory-controllers/nvidia,tegra20-emc.txt |   6 +
 drivers/clk/tegra/Kconfig                     |   3 +
 drivers/clk/tegra/Makefile                    |   2 +-
 drivers/clk/tegra/clk-tegra124-emc.c          |  41 +-
 drivers/clk/tegra/clk-tegra124.c              |  26 +-
 drivers/clk/tegra/clk.h                       |  18 +-
 drivers/devfreq/tegra30-devfreq.c             | 147 ++++---
 drivers/gpu/drm/tegra/Kconfig                 |   1 +
 drivers/gpu/drm/tegra/dc.c                    | 359 +++++++++++++++++
 drivers/gpu/drm/tegra/dc.h                    |  19 +
 drivers/gpu/drm/tegra/drm.c                   |  14 +
 drivers/gpu/drm/tegra/hub.c                   |   3 +
 drivers/gpu/drm/tegra/plane.c                 | 121 ++++++
 drivers/gpu/drm/tegra/plane.h                 |  15 +
 drivers/memory/tegra/Kconfig                  |   5 +-
 drivers/memory/tegra/tegra124-emc.c           | 377 ++++++++++++++++--
 drivers/memory/tegra/tegra124.c               |  82 +++-
 drivers/memory/tegra/tegra20-emc.c            |  48 +--
 drivers/memory/tegra/tegra30-emc.c            | 344 +++++++++++++++-
 drivers/memory/tegra/tegra30.c                | 173 +++++++-
 include/linux/clk/tegra.h                     |   8 +
 include/soc/tegra/emc.h                       |  16 -
 22 files changed, 1651 insertions(+), 177 deletions(-)
 delete mode 100644 include/soc/tegra/emc.h

Comments

Krzysztof Kozlowski Dec. 5, 2020, 2:09 p.m. UTC | #1
On Thu, 3 Dec 2020 22:24:29 +0300, Dmitry Osipenko wrote:
> This series brings initial support for memory interconnect to Tegra20,
> Tegra30 and Tegra124 SoCs.
> 
> For the starter only display controllers and devfreq devices are getting
> interconnect API support, others could be supported later on. The display
> controllers have the biggest demand for interconnect API right now because
> dynamic memory frequency scaling can't be done safely without taking into
> account bandwidth requirement from the displays. In particular this series
> fixes distorted display output on T30 Ouya and T124 TK1 devices.
> 
> [...]

Applied, thanks!

[01/10] dt-bindings: memory: tegra20: emc: Document opp-supported-hw property
[02/10] memory: tegra20: Support hardware versioning and clean up OPP table initialization
[03/10] memory: tegra30: Support interconnect framework
        commit: 01a51facb74fb337ff9fe734caa85dd6e246ef48

Best regards,
Dmitry Osipenko Dec. 7, 2020, 10:11 p.m. UTC | #2
05.12.2020 17:09, Krzysztof Kozlowski пишет:
> On Thu, 3 Dec 2020 22:24:29 +0300, Dmitry Osipenko wrote:
>> This series brings initial support for memory interconnect to Tegra20,
>> Tegra30 and Tegra124 SoCs.
>>
>> For the starter only display controllers and devfreq devices are getting
>> interconnect API support, others could be supported later on. The display
>> controllers have the biggest demand for interconnect API right now because
>> dynamic memory frequency scaling can't be done safely without taking into
>> account bandwidth requirement from the displays. In particular this series
>> fixes distorted display output on T30 Ouya and T124 TK1 devices.
>>
>> [...]
> 
> Applied, thanks!
> 
> [01/10] dt-bindings: memory: tegra20: emc: Document opp-supported-hw property
> [02/10] memory: tegra20: Support hardware versioning and clean up OPP table initialization
> [03/10] memory: tegra30: Support interconnect framework
>         commit: 01a51facb74fb337ff9fe734caa85dd6e246ef48
> 
> Best regards,
> 

Awesome, thanks! Good to have the warning splat silenced.