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[v3,00/13] i915: Prepare for Xe_HP compute engines

Message ID 20220301231549.1817978-1-matthew.d.roper@intel.com (mailing list archive)
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Series i915: Prepare for Xe_HP compute engines | expand

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Matt Roper March 1, 2022, 11:15 p.m. UTC
The Xe_HP architecture introduces compute engines as a new engine class.
These compute command streamers (CCS) are similar to the render engine,
except that they're intended for GPGPU usage and lack support for the 3D
pipeline.

For now we're just sending some initial "under the hood" preparation for
CCS engines without actually exposing them to userspace or adding them
to any platform's engine list yet.  There may be a bit more GuC-related
updates necessary before it's safe to expose them, so the actual uabi
bits will come later once that's all worked out.

v2:
 - General rebase of patches from September.
 - Drop ABI bits for now; we'll make it visible to userspace later once
   all the GuC work is hammered out.

v3:
 - Flip order of RCU_MODE patch and GuC's ADS update to enable compute
   engines.  (Daniele)
 - Replace fls(CCS_MASK) condition on fusing check with a simple IP
   version test to omit pre-Xe_HP platforms.
 - Fix a handful of checkpatch warnings.


Daniele Ceraolo Spurio (3):
  drm/i915/xehp: compute engine pipe_control
  drm/i915/xehp/guc: enable compute engine inside GuC
  drm/i915/xehp: handle fused off CCS engines

Matt Roper (8):
  drm/i915/xehp: Define compute class and engine
  drm/i915/xehp: CCS shares the render reset domain
  drm/i915/xehp: Add Compute CS IRQ handlers
  drm/i915/xehp: CCS should use RCS setup functions
  drm/i915: Move context descriptor fields to intel_lrc.h
  drm/i915/xehp: Define context scheduling attributes in lrc descriptor
  drm/i915/xehp: Enable ccs/dual-ctx in RCU_MODE
  drm/i915/xehp: Add compute workarounds

Matthew Brost (1):
  drm/i915/xehp: Don't support parallel submission on compute / render

Srinivasan Shanmugam (1):
  drm/i915/xehpsdv: Move render/compute engine reset domains related
    workarounds

 drivers/gpu/drm/i915/gem/i915_gem_context.c   | 10 +++
 .../drm/i915/gem/selftests/i915_gem_context.c |  8 +-
 drivers/gpu/drm/i915/gt/gen8_engine_cs.c      | 34 ++++++--
 drivers/gpu/drm/i915/gt/intel_engine.h        |  2 +
 drivers/gpu/drm/i915/gt/intel_engine_cs.c     | 83 +++++++++++++++++++
 drivers/gpu/drm/i915/gt/intel_engine_types.h  | 11 ++-
 drivers/gpu/drm/i915/gt/intel_engine_user.c   |  5 +-
 .../drm/i915/gt/intel_execlists_submission.c  | 24 +++++-
 drivers/gpu/drm/i915/gt/intel_gpu_commands.h  | 15 ++++
 drivers/gpu/drm/i915/gt/intel_gt_irq.c        | 15 +++-
 drivers/gpu/drm/i915/gt/intel_gt_regs.h       | 45 +++-------
 drivers/gpu/drm/i915/gt/intel_lrc.c           | 12 ++-
 drivers/gpu/drm/i915/gt/intel_lrc.h           | 51 ++++++++++++
 drivers/gpu/drm/i915/gt/intel_sseu.c          | 17 +++-
 drivers/gpu/drm/i915/gt/intel_sseu.h          |  4 +-
 drivers/gpu/drm/i915/gt/intel_workarounds.c   | 73 +++++++++++++---
 drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c    |  5 ++
 drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h   | 32 +++++--
 .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 18 +++-
 .../drm/i915/gt/uc/selftest_guc_multi_lrc.c   |  4 +
 drivers/gpu/drm/i915/i915_drv.h               |  2 +
 drivers/gpu/drm/i915/i915_reg.h               |  4 +
 22 files changed, 394 insertions(+), 80 deletions(-)