Message ID | 20220613144800.326124-1-maxime@cerno.tech (mailing list archive) |
---|---|
Headers | show |
Series | drm/vc4: Misc fixes | expand |
On Mon, 13 Jun 2022 16:47:27 +0200, Maxime Ripard wrote: > Here's a collection of small fixes that have been used in the downstream > kernel for a while, affecting several parts of the vc4 driver. > > Let me know what you think, > Maxime > > Dave Stevenson (21): > drm/vc4: drv: Adopt the dma configuration from the HVS or V3D > component > drm/vc4: plane: Fix margin calculations for the right/bottom edges > drm/vc4: plane: Add alpha_blend_mode property to each plane. > drm/vc4: hvs: Add debugfs node that dumps the current display lists > drm/vc4: dpi: Add support for composite syncs to vc4_dpi > drm/vc4: dpi: Add option for inverting pixel clock and output enable > drm/vc4: dpi: Ensure a default format is selected > drm/vc4: dsi: Release workaround buffer and DMA > drm/vc4: dsi: Correct DSI divider calculations > drm/vc4: dsi: Correct pixel order for DSI0 > drm/vc4: dsi: Register dsi0 as the correct vc4 encoder type > drm/vc4: dsi: Fix dsi0 interrupt support > drm/vc4: dsi: Add correct stop condition to vc4_dsi_encoder_disable > iteration > drm/vc4: hdmi: Add all the vc5 HDMI registers into the debugfs dumps > drm/vc4: hdmi: Reset HDMI MISC_CONTROL register > drm/vc4: hdmi: Switch to pm_runtime_status_suspended > drm/vc4: hdmi: Move HDMI reset to pm_resume > drm/vc4: hdmi: Add HDMI format detection registers to register list > drm/vc4: hdmi: Add MISC_CONTROL register for vc4 > drm/vc4: hdmi: Correct HDMI timing registers for interlaced modes > drm/vc4: hdmi: Move pixel doubling from Pixelvalve to HDMI block > > [...] Applied to drm/drm-misc (drm-misc-next). Thanks! Maxime