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[v2,00/12] i915: Add "standalone media" support for MTL

Message ID 20220902233257.3088492-1-matthew.d.roper@intel.com (mailing list archive)
Headers show
Series i915: Add "standalone media" support for MTL | expand

Message

Matt Roper Sept. 2, 2022, 11:32 p.m. UTC
Starting with MTL, media functionality has moved into a new, second GT
at the hardware level.  This new GT, referred to as "standalone media"
in the spec, has its own GuC, power management/forcewake, etc.  The
general non-engine GT registers for standalone media start at 0x380000,
but otherwise use the same MMIO offsets as the primary GT.

Standalone media has a lot of similarity to the remote tiles
present on platforms like xehpsdv and pvc, and our i915 implementation
can share much of the general "multi GT" infrastructure between the two
types of platforms.  However there are a few notable differences
we must deal with:
 - The 0x380000 offset only applies to the non-engine GT registers
   (which the specs refer to as "GSI" registers).  The engine registers
   remain at their usual locations (e.g., 0x1C0000 for VCS0).
 - Unlike platforms with remote tiles, all interrupt handling for
   standalone media still happens via the primary GT.


v2:
 - Added new patches to ensure each GT, not just the primary, is
   handled properly during various init/suspend/resume/teardown flows.
 - Simplified GSI offset handling and split it into its own patch.
 - Correct gt->irq_lock assignment for media GT.
 - Fix jump target for intel_root_gt_init_early() errors.

Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Aravind Iddamsetty <aravind.iddamsetty@intel.com>

Matt Roper (12):
  drm/i915: Move locking and unclaimed check into
    mmio_debug_{suspend,resume}
  drm/i915: Only hook up uncore->debug for primary uncore
  drm/i915: Use managed allocations for extra uncore objects
  drm/i915: Prepare more multi-GT initialization
  drm/i915: Rename and expose common GT early init routine
  drm/i915: Use a DRM-managed action to release the PCI bridge device
  drm/i915: Initialize MMIO access for each GT
  drm/i915: Handle each GT on init/release and suspend/resume
  drm/i915/uncore: Add GSI offset to uncore
  drm/i915/xelpmp: Expose media as another GT
  drm/i915/mtl: Use primary GT's irq lock for media GT
  drm/i915/mtl: Hook up interrupts for standalone media

 drivers/gpu/drm/i915/Makefile                 |   1 +
 drivers/gpu/drm/i915/gt/intel_engine_cs.c     |  10 +-
 drivers/gpu/drm/i915/gt/intel_gt.c            |  96 ++++++++++++----
 drivers/gpu/drm/i915/gt/intel_gt.h            |   4 +-
 drivers/gpu/drm/i915/gt/intel_gt_irq.c        |  35 ++++--
 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.c     |   8 +-
 drivers/gpu/drm/i915/gt/intel_gt_regs.h       |  10 ++
 drivers/gpu/drm/i915/gt/intel_gt_types.h      |   5 +-
 drivers/gpu/drm/i915/gt/intel_rps.c           |  26 ++---
 drivers/gpu/drm/i915/gt/intel_sa_media.c      |  47 ++++++++
 drivers/gpu/drm/i915/gt/intel_sa_media.h      |  15 +++
 drivers/gpu/drm/i915/gt/uc/intel_guc.c        |  24 ++--
 .../gpu/drm/i915/gt/uc/intel_guc_submission.c |   4 +-
 drivers/gpu/drm/i915/gt/uc/intel_uc.c         |   4 +-
 drivers/gpu/drm/i915/i915_driver.c            | 105 ++++++++++++------
 drivers/gpu/drm/i915/i915_drv.h               |   5 +
 drivers/gpu/drm/i915/i915_irq.c               |   4 +-
 drivers/gpu/drm/i915/i915_pci.c               |  15 +++
 drivers/gpu/drm/i915/intel_device_info.h      |  19 ++++
 drivers/gpu/drm/i915/intel_uncore.c           |  83 +++++++++-----
 drivers/gpu/drm/i915/intel_uncore.h           |  28 ++++-
 drivers/gpu/drm/i915/pxp/intel_pxp.c          |   4 +-
 drivers/gpu/drm/i915/pxp/intel_pxp_irq.c      |  14 +--
 drivers/gpu/drm/i915/pxp/intel_pxp_session.c  |   4 +-
 .../gpu/drm/i915/selftests/mock_gem_device.c  |   1 +
 25 files changed, 424 insertions(+), 147 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/gt/intel_sa_media.c
 create mode 100644 drivers/gpu/drm/i915/gt/intel_sa_media.h