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Tue, 4 Oct 2022 21:15:05 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BN8NAM11FT094.mail.protection.outlook.com (10.13.176.131) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.5709.10 via Frontend Transport; Tue, 4 Oct 2022 21:15:04 +0000 Received: from dev.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.28; Tue, 4 Oct 2022 16:15:03 -0500 From: Alex Hung To: , Subject: [RFC PATCH 0/5] Proposal for Pre-blending 3D LUT interfaces Date: Tue, 4 Oct 2022 15:14:46 -0600 Message-ID: <20221004211451.1475215-1-alex.hung@amd.com> X-Mailer: git-send-email 2.37.3 MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT094:EE_|PH8PR12MB7374:EE_ X-MS-Office365-Filtering-Correlation-Id: a5509521-fffb-47b1-ba55-08daa64d8205 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230022)(4636009)(376002)(346002)(396003)(136003)(39860400002)(451199015)(40470700004)(46966006)(36840700001)(1076003)(186003)(16526019)(44832011)(336012)(2616005)(2906002)(7696005)(41300700001)(8936002)(5660300002)(26005)(82740400003)(81166007)(356005)(86362001)(40480700001)(82310400005)(83380400001)(426003)(47076005)(36756003)(36860700001)(40460700003)(54906003)(110136005)(316002)(966005)(478600001)(8676002)(4326008)(70206006)(70586007)(6666004)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Oct 2022 21:15:04.9671 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a5509521-fffb-47b1-ba55-08daa64d8205 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT094.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH8PR12MB7374 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mwen@igalia.com, bhawanpreet.lakha@amd.com, Alex Hung Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" This is an proposal and a draft implementation to enable 3D LUT on drm_plane. This proposal defines a new interface for userspace applications to query hardware capabilities and to pass/enable 3D LUT functions via this DRM/KMS APIs. Overviews: ┌─────────┐ ┌─────────┐ ┌───┐ ┌──────────┐ ┌────────┐ │Userspace│◄──►│3DLUT API│◄──►│DRM│◄──►│GPU driver├──►│hardware│ └─────────┘ └─────────┘ └───┘ └──────────┘ └────────┘ 1. Userspace queries the 3DLUT mode (defined by drm_mode_3dlut_mode) from the GPU drivers (ex. amdgpu). 2. The GPU Driver replies sizes and the color depth of the 3DLUT modes, such as defined by struct lut_3d_mode_17_12bit. 3. If applicable, userspace selects and sets one of preferred 3DLUT modes by "lut_3d_mode" to driver. 4. Userspace passes 3D LUT via drm_property_blob "lut_3d". In the case of the mode "lut_3d_mode_17_12bit", the 3D LUT should have a cube size = 17x17x17 (lut_size), color depth = 12 bits (bit_depth), and X/Y/Z axis = R/G/B (color_format). 5. The GPU driver parses 3D LUT and passes it to hardware pipeline, and enables 3D LUT accordingly. Notes: 1. The patchset is based on the previous work on https://gitlab.freedesktop.org/hwentland/linux/-/tree/color-and-hdr 2. This interface can be part of the newly proposed DRM/KMS color pipeline API (https://gitlab.freedesktop.org/pq/color-and-hdr/-/issues/11). A future integration to the new API may be required or preferred, such as the followings: struct drm_color_pipeline_element { drm_color_pipeline_element_type; drm_color_pipeline_element_lut3d }; struct drm_mode_3dlut_mode -> struct drm_color_pipeline_lut3d_config struct drm_color_pipeline_lut3d { lut_3d_mode_17_12bit; }; struct drm_color_pipeline_lut3d_data { *lut_3d; }; and etc. 3. A patchset "IGT tests for pre-blending 3D LUT interfaces" for this proposal is sent to IGT mailing list. Related Work: - Enable 3D LUT to AMD display drivers (https://www.spinics.net/lists/amd-gfx/msg83032.html) Alex Hung (5): drm: Add 3D LUT mode and its attributes drm: Add Plane 3DLUT and 3DLUT mode properties drm/amd/display: Define 3D LUT struct for HDR planes drm/amd/display: Enable plane 3DLUT mode drm/amd/display: Fill 3D LUT from userspace .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 20 ++ .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 1 + .../amd/display/amdgpu_dm/amdgpu_dm_color.c | 181 ++++++++++++++++++ .../amd/display/modules/color/color_gamma.h | 12 ++ drivers/gpu/drm/drm_atomic_state_helper.c | 3 + drivers/gpu/drm/drm_atomic_uapi.c | 11 ++ drivers/gpu/drm/drm_color_mgmt.c | 68 +++++++ include/drm/drm_mode_object.h | 2 +- include/drm/drm_plane.h | 33 ++++ include/uapi/drm/drm_mode.h | 17 ++ 10 files changed, 347 insertions(+), 1 deletion(-)