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[0/3] i915: CAGF and RC6 changes for MTL

Message ID 20221015032618.2458429-1-ashutosh.dixit@intel.com (mailing list archive)
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Series i915: CAGF and RC6 changes for MTL | expand

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Dixit, Ashutosh Oct. 15, 2022, 3:26 a.m. UTC
This series includes the code changes to get CAGF, RC State and C6
Residency of MTL.

v2: Included "Use GEN12 RPSTAT register" patch

v3:
  - Rebased
  - Dropped "Use GEN12 RPSTAT register" patch from this series
    going to send separate series for it

v4:
- Included "drm/i915/gt: Change RC6 residency functions to accept register
  ID's" based on code review feedback
- Addressed review comments, please see individual patches for changelogs

Ashutosh Dixit (1):
  drm/i915/gt: Change RC6 residency functions to accept register ID's

Badal Nilawar (2):
  drm/i915/mtl: Modify CAGF functions for MTL
  drm/i915/mtl: C6 residency and C state type for MTL SAMedia

 drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c | 84 ++++++++++++++-----
 drivers/gpu/drm/i915/gt/intel_gt_regs.h       |  9 ++
 drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c   | 12 +--
 drivers/gpu/drm/i915/gt/intel_rc6.c           | 65 +++++++++-----
 drivers/gpu/drm/i915/gt/intel_rc6.h           |  9 +-
 drivers/gpu/drm/i915/gt/intel_rc6_types.h     | 10 +++
 drivers/gpu/drm/i915/gt/intel_rps.c           |  8 +-
 drivers/gpu/drm/i915/gt/selftest_rc6.c        |  6 +-
 drivers/gpu/drm/i915/i915_pmu.c               |  6 +-
 9 files changed, 150 insertions(+), 59 deletions(-)