| Message ID | 20240313201955.95716-1-andi.shyti@linux.intel.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | Disable automatic load CCS load balancing | expand |
Ping! Any thoughts here? Andi On Wed, Mar 13, 2024 at 09:19:48PM +0100, Andi Shyti wrote: > Hi, > > this series does basically two things: > > 1. Disables automatic load balancing as adviced by the hardware > workaround. > > 2. Assigns all the CCS slices to one single user engine. The user > will then be able to query only one CCS engine > > >From v5 I have created a new file, gt/intel_gt_ccs_mode.c where > I added the intel_gt_apply_ccs_mode(). In the upcoming patches, > this file will contain the implementation for dynamic CCS mode > setting. > > Thanks Tvrtko, Matt, John and Joonas for your reviews! > > Andi > > Changelog > ========= > v5 -> v6 (thanks Matt for the suggestions in v6) > - Remove the refactoring and the for_each_available_engine() > macro and instead do not create the intel_engine_cs structure > at all. > - In patch 1 just a trivial reordering of the bit definitions. > > v4 -> v5 > - Use the workaround framework to do all the CCS balancing > settings in order to always apply the modes also when the > engine resets. Put everything in its own specific function to > be executed for the first CCS engine encountered. (Thanks > Matt) > - Calculate the CCS ID for the CCS mode as the first available > CCS among all the engines (Thanks Matt) > - create the intel_gt_ccs_mode.c function to host the CCS > configuration. We will have it ready for the next series. > - Fix a selftest that was failing because could not set CCS2. > - Add the for_each_available_engine() macro to exclude CCS1+ and > start using it in the hangcheck selftest. > > v3 -> v4 > - Reword correctly the comment in the workaround > - Fix a buffer overflow (Thanks Joonas) > - Handle properly the fused engines when setting the CCS mode. > > v2 -> v3 > - Simplified the algorithm for creating the list of the exported > uabi engines. (Patch 1) (Thanks, Tvrtko) > - Consider the fused engines when creating the uabi engine list > (Patch 2) (Thanks, Matt) > - Patch 4 now uses a the refactoring from patch 1, in a cleaner > outcome. > > v1 -> v2 > - In Patch 1 use the correct workaround number (thanks Matt). > - In Patch 2 do not add the extra CCS engines to the exposed > UABI engine list and adapt the engine counting accordingly > (thanks Tvrtko). > - Reword the commit of Patch 2 (thanks John). > > Andi Shyti (3): > drm/i915/gt: Disable HW load balancing for CCS > drm/i915/gt: Do not generate the command streamer for all the CCS > drm/i915/gt: Enable only one CCS for compute workload > > drivers/gpu/drm/i915/Makefile | 1 + > drivers/gpu/drm/i915/gt/intel_engine_cs.c | 20 ++++++++--- > drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c | 39 +++++++++++++++++++++ > drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.h | 13 +++++++ > drivers/gpu/drm/i915/gt/intel_gt_regs.h | 6 ++++ > drivers/gpu/drm/i915/gt/intel_workarounds.c | 30 ++++++++++++++-- > 6 files changed, 103 insertions(+), 6 deletions(-) > create mode 100644 drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c > create mode 100644 drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.h > > -- > 2.43.0
On 20/03/2024 15:06, Andi Shyti wrote: > Ping! Any thoughts here? I only casually observed the discussion after I saw Matt suggested further simplifications. As I understood it, you will bring back the uabi engine games when adding the dynamic behaviour and that is fine by me. Regards, Tvrtko > On Wed, Mar 13, 2024 at 09:19:48PM +0100, Andi Shyti wrote: >> Hi, >> >> this series does basically two things: >> >> 1. Disables automatic load balancing as adviced by the hardware >> workaround. >> >> 2. Assigns all the CCS slices to one single user engine. The user >> will then be able to query only one CCS engine >> >> >From v5 I have created a new file, gt/intel_gt_ccs_mode.c where >> I added the intel_gt_apply_ccs_mode(). In the upcoming patches, >> this file will contain the implementation for dynamic CCS mode >> setting. >> >> Thanks Tvrtko, Matt, John and Joonas for your reviews! >> >> Andi >> >> Changelog >> ========= >> v5 -> v6 (thanks Matt for the suggestions in v6) >> - Remove the refactoring and the for_each_available_engine() >> macro and instead do not create the intel_engine_cs structure >> at all. >> - In patch 1 just a trivial reordering of the bit definitions. >> >> v4 -> v5 >> - Use the workaround framework to do all the CCS balancing >> settings in order to always apply the modes also when the >> engine resets. Put everything in its own specific function to >> be executed for the first CCS engine encountered. (Thanks >> Matt) >> - Calculate the CCS ID for the CCS mode as the first available >> CCS among all the engines (Thanks Matt) >> - create the intel_gt_ccs_mode.c function to host the CCS >> configuration. We will have it ready for the next series. >> - Fix a selftest that was failing because could not set CCS2. >> - Add the for_each_available_engine() macro to exclude CCS1+ and >> start using it in the hangcheck selftest. >> >> v3 -> v4 >> - Reword correctly the comment in the workaround >> - Fix a buffer overflow (Thanks Joonas) >> - Handle properly the fused engines when setting the CCS mode. >> >> v2 -> v3 >> - Simplified the algorithm for creating the list of the exported >> uabi engines. (Patch 1) (Thanks, Tvrtko) >> - Consider the fused engines when creating the uabi engine list >> (Patch 2) (Thanks, Matt) >> - Patch 4 now uses a the refactoring from patch 1, in a cleaner >> outcome. >> >> v1 -> v2 >> - In Patch 1 use the correct workaround number (thanks Matt). >> - In Patch 2 do not add the extra CCS engines to the exposed >> UABI engine list and adapt the engine counting accordingly >> (thanks Tvrtko). >> - Reword the commit of Patch 2 (thanks John). >> >> Andi Shyti (3): >> drm/i915/gt: Disable HW load balancing for CCS >> drm/i915/gt: Do not generate the command streamer for all the CCS >> drm/i915/gt: Enable only one CCS for compute workload >> >> drivers/gpu/drm/i915/Makefile | 1 + >> drivers/gpu/drm/i915/gt/intel_engine_cs.c | 20 ++++++++--- >> drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c | 39 +++++++++++++++++++++ >> drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.h | 13 +++++++ >> drivers/gpu/drm/i915/gt/intel_gt_regs.h | 6 ++++ >> drivers/gpu/drm/i915/gt/intel_workarounds.c | 30 ++++++++++++++-- >> 6 files changed, 103 insertions(+), 6 deletions(-) >> create mode 100644 drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c >> create mode 100644 drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.h >> >> -- >> 2.43.0
Hi Tvrtko, On Wed, Mar 20, 2024 at 03:40:18PM +0000, Tvrtko Ursulin wrote: > On 20/03/2024 15:06, Andi Shyti wrote: > > Ping! Any thoughts here? > > I only casually observed the discussion after I saw Matt suggested further > simplifications. As I understood it, you will bring back the uabi engine > games when adding the dynamic behaviour and that is fine by me. yes, the refactoring suggested by you will come later. Thanks, Andi
Joonas, > 1. Disables automatic load balancing as adviced by the hardware > workaround. do we need a documentation update here? Andi
Hi Michal, Mark, can you please ack from your side this first batch of changes? Thanks, Andi On Wed, Mar 13, 2024 at 09:19:48PM +0100, Andi Shyti wrote: > Hi, > > this series does basically two things: > > 1. Disables automatic load balancing as adviced by the hardware > workaround. > > 2. Assigns all the CCS slices to one single user engine. The user > will then be able to query only one CCS engine > > >From v5 I have created a new file, gt/intel_gt_ccs_mode.c where > I added the intel_gt_apply_ccs_mode(). In the upcoming patches, > this file will contain the implementation for dynamic CCS mode > setting. > > Thanks Tvrtko, Matt, John and Joonas for your reviews! > > Andi > > Changelog > ========= > v5 -> v6 (thanks Matt for the suggestions in v6) > - Remove the refactoring and the for_each_available_engine() > macro and instead do not create the intel_engine_cs structure > at all. > - In patch 1 just a trivial reordering of the bit definitions. > > v4 -> v5 > - Use the workaround framework to do all the CCS balancing > settings in order to always apply the modes also when the > engine resets. Put everything in its own specific function to > be executed for the first CCS engine encountered. (Thanks > Matt) > - Calculate the CCS ID for the CCS mode as the first available > CCS among all the engines (Thanks Matt) > - create the intel_gt_ccs_mode.c function to host the CCS > configuration. We will have it ready for the next series. > - Fix a selftest that was failing because could not set CCS2. > - Add the for_each_available_engine() macro to exclude CCS1+ and > start using it in the hangcheck selftest. > > v3 -> v4 > - Reword correctly the comment in the workaround > - Fix a buffer overflow (Thanks Joonas) > - Handle properly the fused engines when setting the CCS mode. > > v2 -> v3 > - Simplified the algorithm for creating the list of the exported > uabi engines. (Patch 1) (Thanks, Tvrtko) > - Consider the fused engines when creating the uabi engine list > (Patch 2) (Thanks, Matt) > - Patch 4 now uses a the refactoring from patch 1, in a cleaner > outcome. > > v1 -> v2 > - In Patch 1 use the correct workaround number (thanks Matt). > - In Patch 2 do not add the extra CCS engines to the exposed > UABI engine list and adapt the engine counting accordingly > (thanks Tvrtko). > - Reword the commit of Patch 2 (thanks John). > > Andi Shyti (3): > drm/i915/gt: Disable HW load balancing for CCS > drm/i915/gt: Do not generate the command streamer for all the CCS > drm/i915/gt: Enable only one CCS for compute workload > > drivers/gpu/drm/i915/Makefile | 1 + > drivers/gpu/drm/i915/gt/intel_engine_cs.c | 20 ++++++++--- > drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c | 39 +++++++++++++++++++++ > drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.h | 13 +++++++ > drivers/gpu/drm/i915/gt/intel_gt_regs.h | 6 ++++ > drivers/gpu/drm/i915/gt/intel_workarounds.c | 30 ++++++++++++++-- > 6 files changed, 103 insertions(+), 6 deletions(-) > create mode 100644 drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c > create mode 100644 drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.h > > -- > 2.43.0
On Wed, Mar 13, 2024 at 09:19:48PM +0100, Andi Shyti wrote: > Hi, > > this series does basically two things: > > 1. Disables automatic load balancing as adviced by the hardware > workaround. > > 2. Assigns all the CCS slices to one single user engine. The user > will then be able to query only one CCS engine > > >From v5 I have created a new file, gt/intel_gt_ccs_mode.c where > I added the intel_gt_apply_ccs_mode(). In the upcoming patches, this > file will contain the implementation for dynamic CCS mode setting. > > Thanks Tvrtko, Matt, John and Joonas for your reviews! > > Andi > > Changelog > ========= > v5 -> v6 (thanks Matt for the suggestions in v6) > - Remove the refactoring and the for_each_available_engine() > macro and instead do not create the intel_engine_cs structure > at all. > - In patch 1 just a trivial reordering of the bit definitions. > > v4 -> v5 > - Use the workaround framework to do all the CCS balancing > settings in order to always apply the modes also when the > engine resets. Put everything in its own specific function to > be executed for the first CCS engine encountered. (Thanks > Matt) > - Calculate the CCS ID for the CCS mode as the first available > CCS among all the engines (Thanks Matt) > - create the intel_gt_ccs_mode.c function to host the CCS > configuration. We will have it ready for the next series. > - Fix a selftest that was failing because could not set CCS2. > - Add the for_each_available_engine() macro to exclude CCS1+ and > start using it in the hangcheck selftest. > > v3 -> v4 > - Reword correctly the comment in the workaround > - Fix a buffer overflow (Thanks Joonas) > - Handle properly the fused engines when setting the CCS mode. > > v2 -> v3 > - Simplified the algorithm for creating the list of the exported > uabi engines. (Patch 1) (Thanks, Tvrtko) > - Consider the fused engines when creating the uabi engine list > (Patch 2) (Thanks, Matt) > - Patch 4 now uses a the refactoring from patch 1, in a cleaner > outcome. > > v1 -> v2 > - In Patch 1 use the correct workaround number (thanks Matt). > - In Patch 2 do not add the extra CCS engines to the exposed > UABI engine list and adapt the engine counting accordingly > (thanks Tvrtko). > - Reword the commit of Patch 2 (thanks John). > > Andi Shyti (3): > drm/i915/gt: Disable HW load balancing for CCS > drm/i915/gt: Do not generate the command streamer for all the CCS > drm/i915/gt: Enable only one CCS for compute workload > > drivers/gpu/drm/i915/Makefile | 1 + > drivers/gpu/drm/i915/gt/intel_engine_cs.c | 20 ++++++++--- > drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c | 39 > +++++++++++++++++++++ drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.h | 13 +++++++ > drivers/gpu/drm/i915/gt/intel_gt_regs.h | 6 ++++ > drivers/gpu/drm/i915/gt/intel_workarounds.c | 30 ++++++++++++++-- > 6 files changed, 103 insertions(+), 6 deletions(-) create mode > 100644 drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c > create mode 100644 drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.h > > -- > 2.43.0 Acked-by: Michal Mrozek <michal.mrozek@intel.com>