From patchwork Fri Apr 5 04:35:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dharma Balasubiramani X-Patchwork-Id: 13618442 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9F014CD11C2 for ; Fri, 5 Apr 2024 04:36:58 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5C371113890; Fri, 5 Apr 2024 04:36:57 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=microchip.com header.i=@microchip.com header.b="II5sgwYQ"; dkim-atps=neutral Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by gabe.freedesktop.org (Postfix) with ESMTPS id A1D9C113890 for ; Fri, 5 Apr 2024 04:36:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1712291815; x=1743827815; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=goGGs6Qp9Tc+FkcaAXqOOsCkNMDrE5spBraGeJFsMKc=; b=II5sgwYQDc5HbSbTtqKIn0eNSYtS5oUKbD6BDeYgMgrDBTFMlknzExJ0 klWWHFlt7eOG0LangLcNtS30lP+68qqC4A2JLxOUPfPlnTBef9uLKuyu7 0X0xg2kORFUSuPEnXJLKK60gbmH7mIDRQ9h0d2fpksG/8dVyRz8PUlx0i 5hkz/Q5PhfLrGka6+cPskp0+LHFTqB5iXgxYU65mEzPZVf3fpHv+3pN8P W7ACGorEM88Ta/C7i04EsmSZF78J+TgOVK/66tnoh8BvCeiYpNZpji9lN ttPhyhW2gffLZySBiDYb2cl6UJ6lK1Oq2qCNfwAjFMMwCKIbz6f9uJCev g==; X-CSE-ConnectionGUID: I3x9LaISQ1uPgH0YvRkiJw== X-CSE-MsgGUID: kwBJdMmISH+6c6LoaLiAAg== X-IronPort-AV: E=Sophos;i="6.07,180,1708412400"; d="scan'208";a="19541022" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 04 Apr 2024 21:36:53 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex02.mchp-main.com (10.10.87.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Thu, 4 Apr 2024 21:36:23 -0700 Received: from che-lt-i70843lx.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Thu, 4 Apr 2024 21:36:10 -0700 From: Dharma Balasubiramani To: "andrzej . hajda @ intel . com" , "neil . armstrong @ linaro . org" , "rfoss @ kernel . org" , "Laurent . pinchart @ ideasonboard . com" , "jonas @ kwiboo . se" , "jernej . skrabec @ gmail . com" , "maarten . lankhorst @ linux . intel . com" , "mripard @ kernel . org" , "tzimmermann @ suse . de" , "airlied @ gmail . com" , "daniel @ ffwll . ch" , "robh+dt @ kernel . org" , "krzysztof . kozlowski+dt @ linaro . org" , "conor+dt @ kernel . org" , "linux @ armlinux . org . uk" , "Nicolas . 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PrasathGE @ microchip . com" , "akpm @ linux-foundation . org" , "deller @ gmx . de" CC: Dharma Balasubiramani Subject: [PATCH v5 0/4] LVDS Controller Support for SAM9X75 SoC Date: Fri, 5 Apr 2024 10:05:32 +0530 Message-ID: <20240405043536.274220-1-dharma.b@microchip.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" This patch series introduces LVDS controller support for the SAM9X75 SoC. The LVDS controller is designed to work with Microchip's sam9x7 series System-on-Chip (SoC) devices, providing Low Voltage Differential Signaling capabilities. Patch series Changelog: - Include configs: at91: Enable LVDS serializer - include all necessary To/Cc entries. The Individual Changelogs are available on the respective patches. Dharma Balasubiramani (4): dt-bindings: display: bridge: add sam9x75-lvds binding drm/bridge: add lvds controller support for sam9x7 MAINTAINERS: add SAM9X7 SoC's LVDS controller ARM: configs: at91: Enable LVDS serializer support .../bridge/microchip,sam9x75-lvds.yaml | 55 +++++ MAINTAINERS | 8 + arch/arm/configs/at91_dt_defconfig | 1 + drivers/gpu/drm/bridge/Kconfig | 7 + drivers/gpu/drm/bridge/Makefile | 1 + drivers/gpu/drm/bridge/microchip-lvds.c | 228 ++++++++++++++++++ 6 files changed, 300 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/bridge/microchip,sam9x75-lvds.yaml create mode 100644 drivers/gpu/drm/bridge/microchip-lvds.c