From patchwork Sun Apr 21 01:10:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dharma Balasubiramani X-Patchwork-Id: 13637277 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0B0A2C4345F for ; Sun, 21 Apr 2024 01:11:58 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 46A4210FC87; Sun, 21 Apr 2024 01:11:57 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=microchip.com header.i=@microchip.com header.b="Lq1J1tC+"; dkim-atps=neutral Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9FFA610FC87 for ; Sun, 21 Apr 2024 01:11:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1713661915; x=1745197915; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=+NHndyStgBNaGg0Gu44NeibBjRQjp+j8aiNKkV+bNiI=; b=Lq1J1tC+LYr8kQtapUDQV6tUZyiQrKvJ+uj6yZ0k9VRsMmB5/z8MdTsb L93zAifgqplgPo6hjwRWnkBTJ9IKehsQnmsr1PV792iybxn0E51EDUeK5 1FCBzXDf48LGg5KfZS7/GfS8Yz8K+otVi5qnyQbbV2B66g79BuvTCAigc vHIks2uwU94vtsuk5W2gQ90c6fAATqYlJavl/Ics11gKJOSirjeWCvBWH rYKjg+P6Ztx5Nwlf0Y1wUKbSnS09eGPyKTFt2d2st8+Toiyl5RqW/o91I IRsAiNOg8hPNXAEKnff1acmIhoSU7dKDhkR45diTOIXz8tbYSSo4qbdOx g==; X-CSE-ConnectionGUID: Z31Mwg63QjairJeGchYeZw== X-CSE-MsgGUID: CoUCdzXmTfOWVot30AcwdQ== X-IronPort-AV: E=Sophos;i="6.07,217,1708412400"; d="scan'208";a="24025071" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 20 Apr 2024 18:11:54 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Sat, 20 Apr 2024 18:11:23 -0700 Received: from che-lt-i70843lx.microchip.com (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Sat, 20 Apr 2024 18:11:10 -0700 From: Dharma Balasubiramani To: "dmitry . baryshkov @ linaro . org" , "andrzej . hajda @ intel . com" , "neil . armstrong @ linaro . org" , "rfoss @ kernel . org" , "Laurent . pinchart @ ideasonboard . com" , "jonas @ kwiboo . se" , "jernej . skrabec @ gmail . com" , "maarten . lankhorst @ linux . intel . com" , "mripard @ kernel . org" , "tzimmermann @ suse . de" , "airlied @ gmail . com" , "daniel @ ffwll . ch" , "robh+dt @ kernel . org" , "krzysztof . kozlowski+dt @ linaro . org" , "conor+dt @ kernel . org" , "linux @ armlinux . org . uk" , "Nicolas . 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PrasathGE @ microchip . com" CC: Dharma Balasubiramani Subject: [PATCH v8 0/4] LVDS Controller Support for SAM9X75 SoC Date: Sun, 21 Apr 2024 06:40:46 +0530 Message-ID: <20240421011050.43265-1-dharma.b@microchip.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" This patch series introduces LVDS controller support for the SAM9X75 SoC. The LVDS controller is designed to work with Microchip's sam9x7 series System-on-Chip (SoC) devices, providing Low Voltage Differential Signaling capabilities. Patch series Changelog: - Include configs: at91: Enable LVDS serializer - include all necessary To/Cc entries. The Individual Changelogs are available on the respective patches. Dharma Balasubiramani (4): dt-bindings: display: bridge: add sam9x75-lvds binding drm/bridge: add lvds controller support for sam9x7 MAINTAINERS: add SAM9X7 SoC's LVDS controller ARM: configs: at91: Enable LVDS serializer support .../bridge/microchip,sam9x75-lvds.yaml | 55 +++++ MAINTAINERS | 8 + arch/arm/configs/at91_dt_defconfig | 1 + drivers/gpu/drm/bridge/Kconfig | 7 + drivers/gpu/drm/bridge/Makefile | 1 + drivers/gpu/drm/bridge/microchip-lvds.c | 229 ++++++++++++++++++ 6 files changed, 301 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/bridge/microchip,sam9x75-lvds.yaml create mode 100644 drivers/gpu/drm/bridge/microchip-lvds.c