| Message ID | 20240520-dpu-handle-te-signal-v1-0-f273b42a089c@linaro.org (mailing list archive) |
|---|---|
| Headers | show |
| Series | drm/msm/dpu: handle non-default TE source pins | expand |
On 5/20/2024 5:12 AM, Dmitry Baryshkov wrote: > Command-mode DSI panels need to signal the display controlller when > vsync happens, so that the device can start sending the next frame. Some > devices (Google Pixel 3) use a non-default pin, so additional > configuration is required. Add a way to specify this information in DT > and handle it in the DSI and DPU drivers. > Which pin is the pixel 3 using? Just wanted to know .. is it gpio0 or gpio1? > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > --- > Dmitry Baryshkov (7): > dt-bindings: display/msm/dsi: allow specifying TE source > drm/msm/dpu: convert vsync source defines to the enum > drm/msm/dsi: drop unused GPIOs handling > drm/msm/dpu: pull the is_cmd_mode out of _dpu_encoder_update_vsync_source() > drm/msm/dpu: rework vsync_source handling > drm/msm/dsi: parse vsync source from device tree > drm/msm/dpu: support setting the TE source > > .../bindings/display/msm/dsi-controller-main.yaml | 16 ++++++++ > drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 11 ++--- > drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h | 5 +-- > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 2 +- > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h | 2 +- > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h | 26 ++++++------ > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.h | 2 +- > drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 44 ++++++++++++++++++++ > drivers/gpu/drm/msm/dsi/dsi.h | 1 + > drivers/gpu/drm/msm/dsi/dsi_host.c | 48 +++++----------------- > drivers/gpu/drm/msm/dsi/dsi_manager.c | 5 +++ > drivers/gpu/drm/msm/msm_drv.h | 6 +++ > 12 files changed, 106 insertions(+), 62 deletions(-) > --- > base-commit: 75fa778d74b786a1608d55d655d42b480a6fa8bd > change-id: 20240514-dpu-handle-te-signal-82663c0211bd > > Best regards,
On Wed, 22 May 2024 at 21:39, Abhinav Kumar <quic_abhinavk@quicinc.com> wrote: > > > > On 5/20/2024 5:12 AM, Dmitry Baryshkov wrote: > > Command-mode DSI panels need to signal the display controlller when > > vsync happens, so that the device can start sending the next frame. Some > > devices (Google Pixel 3) use a non-default pin, so additional > > configuration is required. Add a way to specify this information in DT > > and handle it in the DSI and DPU drivers. > > > > Which pin is the pixel 3 using? Just wanted to know .. is it gpio0 or gpio1? gpio2. If it was gpio0 then there were no issues at all. > > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > > --- > > Dmitry Baryshkov (7): > > dt-bindings: display/msm/dsi: allow specifying TE source > > drm/msm/dpu: convert vsync source defines to the enum > > drm/msm/dsi: drop unused GPIOs handling > > drm/msm/dpu: pull the is_cmd_mode out of _dpu_encoder_update_vsync_source() > > drm/msm/dpu: rework vsync_source handling > > drm/msm/dsi: parse vsync source from device tree > > drm/msm/dpu: support setting the TE source > > > > .../bindings/display/msm/dsi-controller-main.yaml | 16 ++++++++ > > drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 11 ++--- > > drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h | 5 +-- > > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 2 +- > > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h | 2 +- > > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h | 26 ++++++------ > > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.h | 2 +- > > drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 44 ++++++++++++++++++++ > > drivers/gpu/drm/msm/dsi/dsi.h | 1 + > > drivers/gpu/drm/msm/dsi/dsi_host.c | 48 +++++----------------- > > drivers/gpu/drm/msm/dsi/dsi_manager.c | 5 +++ > > drivers/gpu/drm/msm/msm_drv.h | 6 +++ > > 12 files changed, 106 insertions(+), 62 deletions(-) > > --- > > base-commit: 75fa778d74b786a1608d55d655d42b480a6fa8bd > > change-id: 20240514-dpu-handle-te-signal-82663c0211bd > > > > Best regards,
On 5/22/2024 12:59 PM, Dmitry Baryshkov wrote: > On Wed, 22 May 2024 at 21:39, Abhinav Kumar <quic_abhinavk@quicinc.com> wrote: >> >> >> >> On 5/20/2024 5:12 AM, Dmitry Baryshkov wrote: >>> Command-mode DSI panels need to signal the display controlller when >>> vsync happens, so that the device can start sending the next frame. Some >>> devices (Google Pixel 3) use a non-default pin, so additional >>> configuration is required. Add a way to specify this information in DT >>> and handle it in the DSI and DPU drivers. >>> >> >> Which pin is the pixel 3 using? Just wanted to know .. is it gpio0 or gpio1? > > gpio2. If it was gpio0 then there were no issues at all. > Got it. Instead of asking gpio1 or gpio2, I mistyped and asked gpio0 or gpio1. While reviewing the code , I think the function dpu_hw_setup_vsync_source is poorly named . It really doesnt configured vsync_source. It actually configured watchdog timer. Can you pls include one more patch in this series to rename dpu_hw_setup_vsync_source ---> dpu_hw_setup_wd_timer() >> >>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> >>> --- >>> Dmitry Baryshkov (7): >>> dt-bindings: display/msm/dsi: allow specifying TE source >>> drm/msm/dpu: convert vsync source defines to the enum >>> drm/msm/dsi: drop unused GPIOs handling >>> drm/msm/dpu: pull the is_cmd_mode out of _dpu_encoder_update_vsync_source() >>> drm/msm/dpu: rework vsync_source handling >>> drm/msm/dsi: parse vsync source from device tree >>> drm/msm/dpu: support setting the TE source >>> >>> .../bindings/display/msm/dsi-controller-main.yaml | 16 ++++++++ >>> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 11 ++--- >>> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h | 5 +-- >>> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 2 +- >>> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h | 2 +- >>> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h | 26 ++++++------ >>> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.h | 2 +- >>> drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 44 ++++++++++++++++++++ >>> drivers/gpu/drm/msm/dsi/dsi.h | 1 + >>> drivers/gpu/drm/msm/dsi/dsi_host.c | 48 +++++----------------- >>> drivers/gpu/drm/msm/dsi/dsi_manager.c | 5 +++ >>> drivers/gpu/drm/msm/msm_drv.h | 6 +++ >>> 12 files changed, 106 insertions(+), 62 deletions(-) >>> --- >>> base-commit: 75fa778d74b786a1608d55d655d42b480a6fa8bd >>> change-id: 20240514-dpu-handle-te-signal-82663c0211bd >>> >>> Best regards, > > >
On Thu, 30 May 2024 at 01:11, Abhinav Kumar <quic_abhinavk@quicinc.com> wrote: > > > > On 5/22/2024 12:59 PM, Dmitry Baryshkov wrote: > > On Wed, 22 May 2024 at 21:39, Abhinav Kumar <quic_abhinavk@quicinc.com> wrote: > >> > >> > >> > >> On 5/20/2024 5:12 AM, Dmitry Baryshkov wrote: > >>> Command-mode DSI panels need to signal the display controlller when > >>> vsync happens, so that the device can start sending the next frame. Some > >>> devices (Google Pixel 3) use a non-default pin, so additional > >>> configuration is required. Add a way to specify this information in DT > >>> and handle it in the DSI and DPU drivers. > >>> > >> > >> Which pin is the pixel 3 using? Just wanted to know .. is it gpio0 or gpio1? > > > > gpio2. If it was gpio0 then there were no issues at all. > > > > Got it. Instead of asking gpio1 or gpio2, I mistyped and asked gpio0 or > gpio1. > > While reviewing the code , I think the function > dpu_hw_setup_vsync_source is poorly named . It really doesnt configured > vsync_source. It actually configured watchdog timer. > > Can you pls include one more patch in this series to rename > dpu_hw_setup_vsync_source ---> dpu_hw_setup_wd_timer() Ack, sounds like a good idea. > > >> > >>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > >>> --- > >>> Dmitry Baryshkov (7): > >>> dt-bindings: display/msm/dsi: allow specifying TE source > >>> drm/msm/dpu: convert vsync source defines to the enum > >>> drm/msm/dsi: drop unused GPIOs handling > >>> drm/msm/dpu: pull the is_cmd_mode out of _dpu_encoder_update_vsync_source() > >>> drm/msm/dpu: rework vsync_source handling > >>> drm/msm/dsi: parse vsync source from device tree > >>> drm/msm/dpu: support setting the TE source > >>> > >>> .../bindings/display/msm/dsi-controller-main.yaml | 16 ++++++++ > >>> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 11 ++--- > >>> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h | 5 +-- > >>> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 2 +- > >>> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h | 2 +- > >>> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h | 26 ++++++------ > >>> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.h | 2 +- > >>> drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 44 ++++++++++++++++++++ > >>> drivers/gpu/drm/msm/dsi/dsi.h | 1 + > >>> drivers/gpu/drm/msm/dsi/dsi_host.c | 48 +++++----------------- > >>> drivers/gpu/drm/msm/dsi/dsi_manager.c | 5 +++ > >>> drivers/gpu/drm/msm/msm_drv.h | 6 +++ > >>> 12 files changed, 106 insertions(+), 62 deletions(-) > >>> --- > >>> base-commit: 75fa778d74b786a1608d55d655d42b480a6fa8bd > >>> change-id: 20240514-dpu-handle-te-signal-82663c0211bd > >>> > >>> Best regards, > > > > > >
Command-mode DSI panels need to signal the display controlller when vsync happens, so that the device can start sending the next frame. Some devices (Google Pixel 3) use a non-default pin, so additional configuration is required. Add a way to specify this information in DT and handle it in the DSI and DPU drivers. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- Dmitry Baryshkov (7): dt-bindings: display/msm/dsi: allow specifying TE source drm/msm/dpu: convert vsync source defines to the enum drm/msm/dsi: drop unused GPIOs handling drm/msm/dpu: pull the is_cmd_mode out of _dpu_encoder_update_vsync_source() drm/msm/dpu: rework vsync_source handling drm/msm/dsi: parse vsync source from device tree drm/msm/dpu: support setting the TE source .../bindings/display/msm/dsi-controller-main.yaml | 16 ++++++++ drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 11 ++--- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h | 5 +-- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 2 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h | 2 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h | 26 ++++++------ drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.h | 2 +- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 44 ++++++++++++++++++++ drivers/gpu/drm/msm/dsi/dsi.h | 1 + drivers/gpu/drm/msm/dsi/dsi_host.c | 48 +++++----------------- drivers/gpu/drm/msm/dsi/dsi_manager.c | 5 +++ drivers/gpu/drm/msm/msm_drv.h | 6 +++ 12 files changed, 106 insertions(+), 62 deletions(-) --- base-commit: 75fa778d74b786a1608d55d655d42b480a6fa8bd change-id: 20240514-dpu-handle-te-signal-82663c0211bd Best regards,