mbox series

[v1,0/3] Support for Adreno X1-85 GPU

Message ID 20240623110753.141400-1-quic_akhilpo@quicinc.com (mailing list archive)
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Series Support for Adreno X1-85 GPU | expand

Message

Akhil P Oommen June 23, 2024, 11:06 a.m. UTC 
This series adds support for the Adreno X1-85 GPU found in Qualcomm's
compute series chipset, Snapdragon X1 Elite (x1e80100). In this new
naming scheme for Adreno GPU, 'X' stands for compute series, '1' denotes
1st generation and '8' & '5' denotes the tier and the SKU which it
belongs.

X1-85 has major focus on doubling core clock frequency and bandwidth
throughput. It has a dedicated collapsible Graphics MX rail (gmxc) to
power the memories and double the number of data channels to improve
bandwidth to DDR.

Mesa has the necessary bits present already to support this GPU. We are
able to bring up Gnome desktop by hardcoding "0xffff43050a01" as
chipid. Also, verified glxgears and glmark2. We have plans to add the
new chipid support to Mesa in next few weeks, but these patches can go in
right away to get included in v6.11.

This series is rebased on top of v6.10-rc4. P3 cherry-picks cleanly on
qcom/for-next.

P1 & P2 for Rob, P3 for Bjorn to pick up.


Akhil P Oommen (3):
  dt-bindings: display/msm/gmu: Add Adreno X185 GMU
  drm/msm/adreno: Add support for X185 GPU
  arm64: dts: qcom: x1e80100: Add gpu support

 .../devicetree/bindings/display/msm/gmu.yaml  |   4 +
 arch/arm64/boot/dts/qcom/x1e80100.dtsi        | 195 ++++++++++++++++++
 drivers/gpu/drm/msm/adreno/a6xx_gmu.c         |  19 +-
 drivers/gpu/drm/msm/adreno/a6xx_gpu.c         |   6 +-
 drivers/gpu/drm/msm/adreno/adreno_device.c    |  14 ++
 drivers/gpu/drm/msm/adreno/adreno_gpu.h       |   5 +
 6 files changed, 235 insertions(+), 8 deletions(-)

Comments

Krzysztof Kozlowski June 23, 2024, 11:11 a.m. UTC | #1 
On 23/06/2024 13:06, Akhil P Oommen wrote:
> This series adds support for the Adreno X1-85 GPU found in Qualcomm's
> compute series chipset, Snapdragon X1 Elite (x1e80100). In this new
> naming scheme for Adreno GPU, 'X' stands for compute series, '1' denotes
> 1st generation and '8' & '5' denotes the tier and the SKU which it
> belongs.
> 
> X1-85 has major focus on doubling core clock frequency and bandwidth
> throughput. It has a dedicated collapsible Graphics MX rail (gmxc) to
> power the memories and double the number of data channels to improve
> bandwidth to DDR.
> 
> Mesa has the necessary bits present already to support this GPU. We are
> able to bring up Gnome desktop by hardcoding "0xffff43050a01" as
> chipid. Also, verified glxgears and glmark2. We have plans to add the
> new chipid support to Mesa in next few weeks, but these patches can go in
> right away to get included in v6.11.
> 
> This series is rebased on top of v6.10-rc4. P3 cherry-picks cleanly on
> qcom/for-next.
> 
> P1 & P2 for Rob, P3 for Bjorn to pick up.

Which Rob?

Why bindings cannot go as usual way - via the subsystem?

Best regards,
Krzysztof
Dmitry Baryshkov June 23, 2024, 9:24 p.m. UTC | #2 
On Sun, Jun 23, 2024 at 01:11:48PM GMT, Krzysztof Kozlowski wrote:
> On 23/06/2024 13:06, Akhil P Oommen wrote:
> > This series adds support for the Adreno X1-85 GPU found in Qualcomm's
> > compute series chipset, Snapdragon X1 Elite (x1e80100). In this new
> > naming scheme for Adreno GPU, 'X' stands for compute series, '1' denotes
> > 1st generation and '8' & '5' denotes the tier and the SKU which it
> > belongs.
> > 
> > X1-85 has major focus on doubling core clock frequency and bandwidth
> > throughput. It has a dedicated collapsible Graphics MX rail (gmxc) to
> > power the memories and double the number of data channels to improve
> > bandwidth to DDR.
> > 
> > Mesa has the necessary bits present already to support this GPU. We are
> > able to bring up Gnome desktop by hardcoding "0xffff43050a01" as
> > chipid. Also, verified glxgears and glmark2. We have plans to add the
> > new chipid support to Mesa in next few weeks, but these patches can go in
> > right away to get included in v6.11.
> > 
> > This series is rebased on top of v6.10-rc4. P3 cherry-picks cleanly on
> > qcom/for-next.
> > 
> > P1 & P2 for Rob, P3 for Bjorn to pick up.
> 
> Which Rob?
> 
> Why bindings cannot go as usual way - via the subsystem?

They can and should, via msm-next -> drm -> linus's

> 
> Best regards,
> Krzysztof
>
Akhil P Oommen June 24, 2024, 6:21 a.m. UTC | #3 
On Sun, Jun 23, 2024 at 01:11:48PM +0200, Krzysztof Kozlowski wrote:
> On 23/06/2024 13:06, Akhil P Oommen wrote:
> > This series adds support for the Adreno X1-85 GPU found in Qualcomm's
> > compute series chipset, Snapdragon X1 Elite (x1e80100). In this new
> > naming scheme for Adreno GPU, 'X' stands for compute series, '1' denotes
> > 1st generation and '8' & '5' denotes the tier and the SKU which it
> > belongs.
> > 
> > X1-85 has major focus on doubling core clock frequency and bandwidth
> > throughput. It has a dedicated collapsible Graphics MX rail (gmxc) to
> > power the memories and double the number of data channels to improve
> > bandwidth to DDR.
> > 
> > Mesa has the necessary bits present already to support this GPU. We are
> > able to bring up Gnome desktop by hardcoding "0xffff43050a01" as
> > chipid. Also, verified glxgears and glmark2. We have plans to add the
> > new chipid support to Mesa in next few weeks, but these patches can go in
> > right away to get included in v6.11.
> > 
> > This series is rebased on top of v6.10-rc4. P3 cherry-picks cleanly on
> > qcom/for-next.
> > 
> > P1 & P2 for Rob, P3 for Bjorn to pick up.
> 
> Which Rob?

Sorry for the confusion! I meant Rob Clark whom I had added in the "To:"
list.

-Akhil

> 
> Why bindings cannot go as usual way - via the subsystem?
> 
> Best regards,
> Krzysztof
> 
>
Krzysztof Kozlowski June 24, 2024, 10:21 a.m. UTC | #4 
On 24/06/2024 08:21, Akhil P Oommen wrote:
> On Sun, Jun 23, 2024 at 01:11:48PM +0200, Krzysztof Kozlowski wrote:
>> On 23/06/2024 13:06, Akhil P Oommen wrote:
>>> This series adds support for the Adreno X1-85 GPU found in Qualcomm's
>>> compute series chipset, Snapdragon X1 Elite (x1e80100). In this new
>>> naming scheme for Adreno GPU, 'X' stands for compute series, '1' denotes
>>> 1st generation and '8' & '5' denotes the tier and the SKU which it
>>> belongs.
>>>
>>> X1-85 has major focus on doubling core clock frequency and bandwidth
>>> throughput. It has a dedicated collapsible Graphics MX rail (gmxc) to
>>> power the memories and double the number of data channels to improve
>>> bandwidth to DDR.
>>>
>>> Mesa has the necessary bits present already to support this GPU. We are
>>> able to bring up Gnome desktop by hardcoding "0xffff43050a01" as
>>> chipid. Also, verified glxgears and glmark2. We have plans to add the
>>> new chipid support to Mesa in next few weeks, but these patches can go in
>>> right away to get included in v6.11.
>>>
>>> This series is rebased on top of v6.10-rc4. P3 cherry-picks cleanly on
>>> qcom/for-next.
>>>
>>> P1 & P2 for Rob, P3 for Bjorn to pick up.
>>
>> Which Rob?
> 
> Sorry for the confusion! I meant Rob Clark whom I had added in the "To:"
> list.

OK, thanks for confirming, it is correct.

Best regards,
Krzysztof