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[v2,0/9] Add display support for QCS615 platform

Message ID 20241113-add-display-support-for-qcs615-platform-v2-0-2873eb6fb869@quicinc.com (mailing list archive)
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Series Add display support for QCS615 platform | expand

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Fange Zhang Nov. 13, 2024, 11:51 a.m. UTC
This series aims to enable display on the QCS615 platform

1.Add MDSS & DPU support for QCS615     
2.Add DSI support for QCS615            

Note:
items still being confirmed
- missing reg_bus_bw
- missing refgen supply

This patch series depends on below patch series:
- rpmhcc
https://lore.kernel.org/all/20241022-qcs615-clock-driver-v4-2-3d716ad0d987@quicinc.com/
- gcc
https://lore.kernel.org/all/20241022-qcs615-clock-driver-v4-4-3d716ad0d987@quicinc.com/
- base
https://lore.kernel.org/all/20241104-add_initial_support_for_qcs615-v5-0-9dde8d7b80b0@quicinc.com/
- Apps SMMU
https://lore.kernel.org/all/20241105032107.9552-4-quic_qqzhou@quicinc.com/
- I2C
https://lore.kernel.org/all/20241111084331.2564643-1-quic_vdadhani@quicinc.com/
- dispcc
https://lore.kernel.org/all/20241108-qcs615-mm-clockcontroller-v3-0-7d3b2d235fdf@quicinc.com/
- dispcc dts
https://lore.kernel.org/lkml/20241108-qcs615-mm-dt-nodes-v1-0-b2669cac0624@quicinc.com/

Signed-off-by: Li Liu <quic_lliu6@quicinc.com>
Signed-off-by: Fange Zhang <quic_fangez@quicinc.com>
---
Changes in v2:
- Added b4 check and check passed
- Added necessary blank line
- Added correct S-o-B
- Added correct maintainer
- Added correct To&Cc
- Added QCS615 DP controller comment in commit message
- Added comments for dsi_dp_hpd_cfg_pins and dsi_dp_cdet_cfg_pins
- Added missing port@1 for connector
- Changed patch order
- Changed 0 to QCOM_ICC_TAG_ALWAYS for mdss interconnects
- Changed 0 to GPIO_ACTIVE_HIGH for GPIO flags
- Fix indent issue
- Fix sorted issue
- Moved anx_7625 to same node
- Moved status to last
- Renamed dsi0_hpd_cfg_pins to dsi_dp_hpd_cfg_pins
- Renamed dsi0_cdet_cfg_pins to dsi_dp_cdet_cfg_pins
- Renamed anx_7625_1 to dsi_anx_7625
- Removed extra blank line
- Removed absent block
- Removed merge_3d value
- Removed redundant annotation
- Removed unsupported dsi clk in dsi0_opp_table
- Removed dp_hpd_cfg_pins node
- Splited patch according to requirements
- Link to v2: https://lore.kernel.org/r/20241014-add_display_support_for_qcs615-v1-0-4efa191dbdd4@quicinc.com

---
Li Liu (9):
      dt-bindings: display/msm: Add QCS615 DSI phy
      dt-bindings: display/msm: dsi-controller-main: Document QCS615
      dt-bindings: display/msm: Add QCS615 MDSS & DPU
      drm/msm/dpu: Add QCS615 support
      drm/msm: mdss: Add QCS615 support
      drm/msm/dsi: Add support for QCS615
      arm64: dts: qcom: Add display support for QCS615
      arm64: dts: qcom: Add display support for QCS615 RIDE board
      arm64: defconfig: Enable SX150X for QCS615 ride board

 .../bindings/display/msm/dsi-controller-main.yaml  |   1 +
 .../bindings/display/msm/dsi-phy-14nm.yaml         |   1 +
 .../bindings/display/msm/qcom,qcs615-dpu.yaml      | 118 +++++++++
 .../bindings/display/msm/qcom,qcs615-mdss.yaml     | 252 ++++++++++++++++++++
 arch/arm64/boot/dts/qcom/qcs615-ride.dts           | 109 +++++++++
 arch/arm64/boot/dts/qcom/qcs615.dtsi               | 186 ++++++++++++++-
 arch/arm64/configs/defconfig                       |   1 +
 .../gpu/drm/msm/disp/dpu1/catalog/dpu_5_3_qcs615.h | 263 +++++++++++++++++++++
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c     |   1 +
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h     |   1 +
 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c            |   1 +
 drivers/gpu/drm/msm/dsi/dsi_cfg.c                  |  17 ++
 drivers/gpu/drm/msm/dsi/dsi_cfg.h                  |   1 +
 drivers/gpu/drm/msm/dsi/phy/dsi_phy.c              |   2 +
 drivers/gpu/drm/msm/dsi/phy/dsi_phy.h              |   1 +
 drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c         |  21 ++
 drivers/gpu/drm/msm/msm_mdss.c                     |   7 +
 17 files changed, 982 insertions(+), 1 deletion(-)
---
base-commit: 929beafbe7acce3267c06115e13e03ff6e50548a
change-id: 20241112-add-display-support-for-qcs615-platform-674ed6c8e150
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Best regards,