From patchwork Thu Nov 21 04:25:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?SmFzb24tSkggTGluICjmnpfnnb/npaUp?= X-Patchwork-Id: 13881620 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 688C4D75BB2 for ; Thu, 21 Nov 2024 04:26:20 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9DD3A10E85B; Thu, 21 Nov 2024 04:26:19 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (1024-bit key; unprotected) header.d=mediatek.com header.i=@mediatek.com header.b="N9pgPn37"; dkim-atps=neutral Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by gabe.freedesktop.org (Postfix) with ESMTPS id 66D5910E85A for ; Thu, 21 Nov 2024 04:26:10 +0000 (UTC) X-UUID: b8fe20eca7c011ef99858b75a2457dd9-20241121 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:Message-ID:Date:Subject:CC:To:From; bh=3ghlE111DUE2HnHAtWYt9SyfO1QWC8nbhrgrUa0cNfI=; b=N9pgPn372/aPBMUI+HOi9jPojmToV3KnashYuPGNTGcWPIa3UA+XPb7qe8w16rr9y4tbngRGOo6JsvnvQH6mOBFt+uq/Xp8NoKJwRUjwi/EOk1IzAGL6pXpGSFGU00fopDHO3qnmsfXK/8e3rSuB9IIKX5SYf4Sxjvm1Ntc5CEE=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.44, REQID:c17f987b-b037-4069-8508-48cb68c87b11, IP:0, U RL:0,TC:0,Content:50,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:50 X-CID-META: VersionHash:464815b, CLOUDID:601c27b9-596a-4e31-81f2-cae532fa1b81, B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102|801,TC:nil,Content:3,EDM:-3,IP:n il,URL:0,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LE S:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: b8fe20eca7c011ef99858b75a2457dd9-20241121 Received: from mtkmbs13n1.mediatek.inc [(172.21.101.193)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1033751027; Thu, 21 Nov 2024 12:26:05 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs13n2.mediatek.inc (172.21.101.108) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Thu, 21 Nov 2024 12:26:03 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Thu, 21 Nov 2024 12:26:03 +0800 From: Jason-JH.Lin To: Jassi Brar , Chun-Kuang Hu , AngeloGioacchino Del Regno , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , Mauro Carvalho Chehab CC: David Airlie , Simona Vetter , Moudy Ho , , , , , , , "Jason-JH . Lin" , Singo Chang , Nancy Lin , Subject: [PATCH 0/8] Add GCE support for MT8196 Date: Thu, 21 Nov 2024 12:25:54 +0800 Message-ID: <20241121042602.32730-1-jason-jh.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 X-MTK: N X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" This patch series adds support for the MediaTek MT8196 SoC in the CMDQ driver and related subsystems. The changes include adding compatible names and properties, updating driver data to accommodate hardware changes, and modifying the CMDQ API to support non-subsys ID hardware. Jason-JH.Lin (8): dt-bindings: mailbox: mediatek: Add GCE header file for MT8196 dt-bindings: mailbox: mediatek: Add MT8196 support for gce-mailbox mailbox: mtk-cmdq: Add driver data to support for MT8196 soc: mediatek: mtk-cmdq: Add unsupported subsys ID programing flow soc: mediatek: mtk-cmdq: Add mminfra_offset compatibility for DRAM address soc: mediatek: Add pa_base due to CMDQ API change drm/mediatek: Add pa_base due to CMDQ API change media: mediatek: mdp3: Add pa_base due to CMDQ API change .../mailbox/mediatek,gce-mailbox.yaml | 4 + drivers/gpu/drm/mediatek/mtk_ddp_comp.c | 6 +- drivers/mailbox/mtk-cmdq-mailbox.c | 107 +- .../platform/mediatek/mdp3/mtk-mdp3-cmdq.c | 4 +- .../platform/mediatek/mdp3/mtk-mdp3-comp.h | 4 +- drivers/soc/mediatek/mtk-cmdq-helper.c | 133 +- drivers/soc/mediatek/mtk-mmsys.c | 1 + drivers/soc/mediatek/mtk-mutex.c | 2 +- .../dt-bindings/mailbox/mediatek,mt8196-gce.h | 1449 +++++++++++++++++ include/linux/mailbox/mtk-cmdq-mailbox.h | 3 + include/linux/soc/mediatek/mtk-cmdq.h | 22 +- 11 files changed, 1698 insertions(+), 37 deletions(-) create mode 100755 include/dt-bindings/mailbox/mediatek,mt8196-gce.h