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Mon, 25 Nov 2024 09:33:07 +0000 Received: from AM7PR04MB7046.eurprd04.prod.outlook.com ([fe80::d1ce:ea15:6648:6f90]) by AM7PR04MB7046.eurprd04.prod.outlook.com ([fe80::d1ce:ea15:6648:6f90%6]) with mapi id 15.20.8182.019; Mon, 25 Nov 2024 09:33:07 +0000 From: Liu Ying To: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org Cc: p.zabel@pengutronix.de, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, glx@linutronix.de, vkoul@kernel.org, kishon@kernel.org, aisheng.dong@nxp.com, agx@sigxcpu.org, francesco@dolcini.it, frank.li@nxp.com, dmitry.baryshkov@linaro.org Subject: [PATCH v4 00/19] Add Freescale i.MX8qxp Display Controller support Date: Mon, 25 Nov 2024 17:32:57 +0800 Message-Id: <20241125093316.2357162-1-victor.liu@nxp.com> X-Mailer: git-send-email 2.34.1 X-ClientProxiedBy: SG2PR01CA0131.apcprd01.prod.exchangelabs.com (2603:1096:4:40::35) To AM7PR04MB7046.eurprd04.prod.outlook.com (2603:10a6:20b:113::22) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM7PR04MB7046:EE_|AM9PR04MB8970:EE_ X-MS-Office365-Filtering-Correlation-Id: 30c5afd5-3c4f-4fe5-7169-08dd0d342ae3 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:AM7PR04MB7046.eurprd04.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230040)(1800799024)(366016)(376014)(52116014)(7416014)(38350700014); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: rYYrFCDiTKypQ+9VD66taWuALo9DBB6QVzqPXRzgL6Sum/nJQ68yCwFw1b49m51v8mOybotJXD1RDtb7vuxCmXgIEANKDt8x2g8CcwU1IFDmXEUaXhDjEu9Q+X7/F1K0AAveY2rwEv8KPT1z6bd9ZUq7cs7Bjkl5dQvfQCHxbPJUFSEWlyiBC6SAvR/ArchjFnBEyhX1rruvLIIcrSga6rttlNBYY7uOXVpQMvEbBXgDkOrB0E+EuLp++g3VH3yfQIFGzEm5I7fWu5oi5NclI/jJHzzX8bn/8OVCkX3Y6UQY5UrJMNMpijKGA9Tm9SDN+40gL648g+88WZVkylZK0m+LiJBT1Sx9LSJ7unkhJ3wsTUorwjDfVHKP9IPSPEAdp9dvO05ueJE0ptVG0hQxz7Hap/Na1R3WavKZhJNcgAb7Cn+FkkoxNC+F45zu7X0UIsHc0MJVXd7mNC4pT4FiTChkS2k2ZIZqoJ6HeP3eZQD+4wEPqL7oLwTQb4Iiq+UWmUbqv5h+ZVX3E6bov/0Ne2Mtc3nfA0xCFI3+yxt6rzYnR603mjMJFACtKGUP7GIE8PGrj7JbZviMRSULL1feZDsX2qVmABXDdVpTCOefxzdKLeRNXXyS2GGGr7olQUoh6Yjl9GF7jOclSXTb5AgsqH8x9VnJL/iyNoNdcuCzcqOUaCsGiEer14B8dI+iGtUTlaJE48dwFkvikMCf++CbyKcQ9bT3ZQzfDxnUzV3AhAnIv3KCv3WTrTueMNbKW10Zf8uG377JZ4nQHs6oI5q7Y3m/yeymoDq6QrINldWDAbDAgwPiUsgkXCgdxZ8udqGbJjEoXd186tlH6hc9Wa8nxPBG4GnEZOlns5vblcb69tvRUyVDjRQAXjXory7KFq76yV2eQd2386Swmx/TdeAKjOnIg198HIh1VayqySpZzUpm0lwI2PA/2etsRjnlefZ5+c0MIFZO/eWZfARURvoQ1B3e0RM75rcMH5EBxGEvQMkHVlafQ+7YuQqr/LDWzlRnhPkjEI8UL4/H0x2QdcKDHQuLgvcS7x3m+/dgtSkrsxKDXumUhYBnRIpJVWReL1BC9Spzc7syhsi1wv3PHrt2/R/Uu8s2+0XZKlk3kIz5/pKF3bwsUzepb2zmWV3Deg1TpzQdf2xsAz1lIlJce+aAhs4Q4X5IEHn21DnSyzHO2duSmlRcCwCGL4dCseAzOyQMvViAF0BqFotSR/Sm72M7r0jx+W+0Rt/GvAiH2qTQX1KvMULGabjpyury+soJdPtmHE4/7kUwKZELMEqsVHvEc4PA+WTze4mLom2JpZKX9dhqx9PsX7HZ1tmPyMvdvcDDl3Na3aDWCBZYsxqqBqfe+K6WoZqDzvIOt9oVxVY7+tO9pPKW1yVRKLhc3Aax30BbUpHV9j/3qY11NtRSb8CLl5eCdRXyQBjmJLpNZi0fM3Z90LXQZaPH1JLjdmB7mptyZ6tWcalqFrDrNgF1CoW0CWC7TaNSMZmsYKqPp1G1Mi92zFbemJmH53Hf1b9XmP2xtUhEqprSfS5Y3tmWQi7zAOMTWz04s9f8a0+UkcvDsClD4T+rJvRGMW4Se61kzH5k X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 30c5afd5-3c4f-4fe5-7169-08dd0d342ae3 X-MS-Exchange-CrossTenant-AuthSource: AM7PR04MB7046.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Nov 2024 09:33:06.9005 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 81GRxYRLllcO0xdOpdpo0bl2WLcXF9FYeXabvTgpZJqE1iJgTe+jwZsWVgcyNGmdJVgrYKKBIhhSlk9rf6fyOQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM9PR04MB8970 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Hi, This patch series aims to add Freescale i.MX8qxp Display Controller support. The controller is comprised of three main components that include a blit engine for 2D graphics accelerations, display controller for display output processing, as well as a command sequencer. Previous patch series attempts to do that can be found at: https://patchwork.freedesktop.org/series/84524/ This series addresses Maxime's comments on the previous one: a. Split the display controller into multiple internal devices. 1) List display engine, pixel engine, interrupt controller and more as the controller's child devices. 2) List display engine and pixel engine's processing units as their child devices. b. Add minimal feature support. Only support two display pipelines with primary planes with XR24 fb, backed by two fetchunits. No fetchunit dynamic allocation logic(to be done when necessary). c. Use drm_dev_{enter, exit}(). Since this series changes a lot comparing to the previous one, I choose to send it with a new patch series, not a new version. To follow up i.MX8qxp TRM, I changed the controller name to "Display Controller" instead of the previous "DPU". "DPU" is only mentioned in the SoC block diagram and represents the whole display subsystem which includes the display controller and prefech engines, etc. With an additional patch[1] for simple-pm-bus.c, this series facilitates testing a LVDS panel on i.MX8qxp MEK. Please do NOT merge patch 14-19. [1] https://lkml.org/lkml/2023/1/25/120 v4: * Collect Rob's R-b tags on DT binding patches(patch 1-5). * Replace "fsl,iram" property with standard "sram" property in fsl,imx8qxp-dc-command-sequencer.yaml in patch 6. (Rob) * Use regmap to define register map for all registers. (Dmitry) * Use regmap APIs to access registers. (Dmitry) * Inline some small functions. (Dmitry) * Move dc_fg_displaymode(), dc_fg_panic_displaymode() and dc_lb_blendcontrol() function calls from KMS routine to initialization stage. (Dmitry) * Drop dc-crtc.h and dc-plane.h header files and move relevant defines to appropriate .h header files or .c source files. (Dmitry) * Drop futile "else" clause from dc_crtc_common_irq_handler(). (Dmitry) * Drop dc_drm->pe_rpm_count. (Dmitry) * Drop DC_{CRTCS,ENCODERS,PRIMARYS} macros and only use DC_DISPLAYS. (Dmitry) * Drop drmm_kcalloc() function call to allocate an array for storing IRQs. Instead, put it in struct dc_crtc. (Dmitry) * Call devm_request_irq() to request IRQs, instead of using drmm action. (Dmitry) * Call devm_drm_of_get_bridge() to find the next bridge. (Dmitry) * Select DRM_CLIENT_SELECTION due to rebase. * Select the missing DRM_DISPLAY_HELPER and DRM_BRIDGE_CONNECTOR. * Use devm_kzalloc() to drmm_kzalloc() to allocate dc_* data strutures. * Drop unnecessary private struct dc_*_priv from DC internal device drivers. * Set suppress_bind_attrs driver flag to true in DC internal device drivers to avoid unnecessary sys interfaces to bind/unbind the drivers. * Make some fetch unit operations be aware of fractional fetch unit index(0-7). * Take DC interrupt controller driver as a standalone driver instead of a component driver. * Replace drmm_kcalloc() with devm_kcalloc() to allocate an array for struct dc_ic_entry. * Call platform_get_irq() from DC interrupt controller driver to make sure parent interrupt controller driver is probed first. * Use DRM_FBDEV_DMA_DRIVER_OPS due to rebase. * Replace drm_fbdev_dma_setup() with drm_client_setup_with_fourcc() due to rebase. * Replace drmm_add_action_or_reset() with devm_add_action_or_reset() to register dc_drm_component_unbind_all() action. * Request interrupts in dc_crtc_post_init() after encoder initialization to make sure next bridge is found first. * Trivial tweaks. v3: * Collect Rob's R-b tag on the patch for adding fsl,imx8qxp-dc-intc.yaml. * Combine fsl,imx8qxp-dc-fetchunit-common.yaml, fsl,imx8qxp-dc-fetchlayer.yaml and fsl,imx8qxp-dc-fetchwarp.yaml into 1 schema doc fsl,imx8qxp-dc-fetchunit.yaml. (Rob) * Document all processing units, command sequencer, axi performance counter and blit engine. (Rob) v2: * Drop fsl,dc-*-id DT properties from fsl,imx8qxp-dc*.yaml. (Krzysztof) * Move port property from fsl,imx8qxp-dc-display-engine.yaml to fsl,imx8qxp-dc-tcon.yaml. (Krzysztof) * Drop unneeded "|" from fsl,imx8qxp-dc-intc.yaml. (Krzysztof) * Use generic pmu pattern property in fsl,imx8qxp-dc.yaml. (Krzysztof) * Fix register range size in fsl,imx8qxp-dc*.yaml. * Use OF alias id to get instance id from display driver. * Find next bridge from TCon's port from display driver. * Drop drm/drm_module.h include from dc-drv.c. * Improve file list in MAINTAINERS. (Frank) * Add entire i.MX8qxp display controller device tree for review. (Krzysztof) * Add MIPI/LVDS subsystems device tree and a DT overlay for imx8qxp MEK to test a LVDS panel as an example. (Francesco) Liu Ying (19): dt-bindings: display: imx: Add i.MX8qxp Display Controller processing units dt-bindings: display: imx: Add i.MX8qxp Display Controller blit engine dt-bindings: display: imx: Add i.MX8qxp Display Controller display engine dt-bindings: display: imx: Add i.MX8qxp Display Controller pixel engine dt-bindings: display: imx: Add i.MX8qxp Display Controller AXI performance counter dt-bindings: display: imx: Add i.MX8qxp Display Controller command sequencer dt-bindings: interrupt-controller: Add i.MX8qxp Display Controller interrupt controller dt-bindings: display: imx: Add i.MX8qxp Display Controller drm/imx: Add i.MX8qxp Display Controller display engine drm/imx: Add i.MX8qxp Display Controller pixel engine drm/imx: Add i.MX8qxp Display Controller interrupt controller drm/imx: Add i.MX8qxp Display Controller KMS MAINTAINERS: Add maintainer for i.MX8qxp Display Controller dt-bindings: phy: mixel, mipi-dsi-phy: Allow assigned-clock* properties dt-bindings: firmware: imx: Add SCU controlled display pixel link nodes arm64: dts: imx8qxp: Add display controller subsystem arm64: dts: imx8qxp: Add MIPI-LVDS combo subsystems arm64: dts: imx8qxp-mek: Enable display controller arm64: dts: imx8qxp-mek: Add MX8-DLVDS-LCD1 display module support ...sl,imx8qxp-dc-axi-performance-counter.yaml | 57 ++ .../imx/fsl,imx8qxp-dc-blit-engine.yaml | 204 +++++++ .../display/imx/fsl,imx8qxp-dc-blitblend.yaml | 41 ++ .../display/imx/fsl,imx8qxp-dc-clut.yaml | 44 ++ .../imx/fsl,imx8qxp-dc-command-sequencer.yaml | 67 +++ .../imx/fsl,imx8qxp-dc-constframe.yaml | 44 ++ .../imx/fsl,imx8qxp-dc-display-engine.yaml | 152 +++++ .../display/imx/fsl,imx8qxp-dc-dither.yaml | 45 ++ .../display/imx/fsl,imx8qxp-dc-extdst.yaml | 72 +++ .../display/imx/fsl,imx8qxp-dc-fetchunit.yaml | 141 +++++ .../display/imx/fsl,imx8qxp-dc-filter.yaml | 43 ++ .../display/imx/fsl,imx8qxp-dc-framegen.yaml | 64 ++ .../display/imx/fsl,imx8qxp-dc-gammacor.yaml | 32 + .../imx/fsl,imx8qxp-dc-layerblend.yaml | 39 ++ .../display/imx/fsl,imx8qxp-dc-matrix.yaml | 44 ++ .../imx/fsl,imx8qxp-dc-pixel-engine.yaml | 250 ++++++++ .../display/imx/fsl,imx8qxp-dc-rop.yaml | 43 ++ .../display/imx/fsl,imx8qxp-dc-safety.yaml | 34 ++ .../imx/fsl,imx8qxp-dc-scaling-engine.yaml | 83 +++ .../display/imx/fsl,imx8qxp-dc-signature.yaml | 53 ++ .../display/imx/fsl,imx8qxp-dc-store.yaml | 96 +++ .../display/imx/fsl,imx8qxp-dc-tcon.yaml | 45 ++ .../bindings/display/imx/fsl,imx8qxp-dc.yaml | 236 ++++++++ .../devicetree/bindings/firmware/fsl,scu.yaml | 20 + .../fsl,imx8qxp-dc-intc.yaml | 318 ++++++++++ .../bindings/phy/mixel,mipi-dsi-phy.yaml | 5 - MAINTAINERS | 8 + arch/arm64/boot/dts/freescale/Makefile | 4 + .../arm64/boot/dts/freescale/imx8-ss-dc0.dtsi | 408 +++++++++++++ .../imx8qxp-mek-mx8-dlvds-lcd1-lvds0-odd.dtso | 183 ++++++ arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 34 ++ .../boot/dts/freescale/imx8qxp-ss-dc.dtsi | 240 ++++++++ .../dts/freescale/imx8qxp-ss-mipi-lvds.dtsi | 437 ++++++++++++++ arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 28 +- drivers/gpu/drm/imx/Kconfig | 1 + drivers/gpu/drm/imx/Makefile | 1 + drivers/gpu/drm/imx/dc/Kconfig | 11 + drivers/gpu/drm/imx/dc/Makefile | 7 + drivers/gpu/drm/imx/dc/dc-cf.c | 162 +++++ drivers/gpu/drm/imx/dc/dc-crtc.c | 558 ++++++++++++++++++ drivers/gpu/drm/imx/dc/dc-de.c | 153 +++++ drivers/gpu/drm/imx/dc/dc-de.h | 60 ++ drivers/gpu/drm/imx/dc/dc-drv.c | 283 +++++++++ drivers/gpu/drm/imx/dc/dc-drv.h | 52 ++ drivers/gpu/drm/imx/dc/dc-ed.c | 270 +++++++++ drivers/gpu/drm/imx/dc/dc-fg.c | 374 ++++++++++++ drivers/gpu/drm/imx/dc/dc-fl.c | 180 ++++++ drivers/gpu/drm/imx/dc/dc-fu.c | 268 +++++++++ drivers/gpu/drm/imx/dc/dc-fu.h | 129 ++++ drivers/gpu/drm/imx/dc/dc-fw.c | 219 +++++++ drivers/gpu/drm/imx/dc/dc-ic.c | 279 +++++++++ drivers/gpu/drm/imx/dc/dc-kms.c | 143 +++++ drivers/gpu/drm/imx/dc/dc-kms.h | 58 ++ drivers/gpu/drm/imx/dc/dc-lb.c | 319 ++++++++++ drivers/gpu/drm/imx/dc/dc-pe.c | 133 +++++ drivers/gpu/drm/imx/dc/dc-pe.h | 100 ++++ drivers/gpu/drm/imx/dc/dc-plane.c | 241 ++++++++ drivers/gpu/drm/imx/dc/dc-tc.c | 138 +++++ 58 files changed, 7747 insertions(+), 6 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-axi-performance-counter.yaml create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-blit-engine.yaml create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-blitblend.yaml create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-clut.yaml create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-command-sequencer.yaml create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-constframe.yaml create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-display-engine.yaml create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-dither.yaml create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-extdst.yaml create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-fetchunit.yaml create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-filter.yaml create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-framegen.yaml create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-gammacor.yaml create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-layerblend.yaml create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-matrix.yaml create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-pixel-engine.yaml create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-rop.yaml create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-safety.yaml create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-scaling-engine.yaml create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-signature.yaml create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-store.yaml create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-tcon.yaml create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc.yaml create mode 100644 Documentation/devicetree/bindings/interrupt-controller/fsl,imx8qxp-dc-intc.yaml create mode 100644 arch/arm64/boot/dts/freescale/imx8-ss-dc0.dtsi create mode 100644 arch/arm64/boot/dts/freescale/imx8qxp-mek-mx8-dlvds-lcd1-lvds0-odd.dtso create mode 100644 arch/arm64/boot/dts/freescale/imx8qxp-ss-dc.dtsi create mode 100644 arch/arm64/boot/dts/freescale/imx8qxp-ss-mipi-lvds.dtsi create mode 100644 drivers/gpu/drm/imx/dc/Kconfig create mode 100644 drivers/gpu/drm/imx/dc/Makefile create mode 100644 drivers/gpu/drm/imx/dc/dc-cf.c create mode 100644 drivers/gpu/drm/imx/dc/dc-crtc.c create mode 100644 drivers/gpu/drm/imx/dc/dc-de.c create mode 100644 drivers/gpu/drm/imx/dc/dc-de.h create mode 100644 drivers/gpu/drm/imx/dc/dc-drv.c create mode 100644 drivers/gpu/drm/imx/dc/dc-drv.h create mode 100644 drivers/gpu/drm/imx/dc/dc-ed.c create mode 100644 drivers/gpu/drm/imx/dc/dc-fg.c create mode 100644 drivers/gpu/drm/imx/dc/dc-fl.c create mode 100644 drivers/gpu/drm/imx/dc/dc-fu.c create mode 100644 drivers/gpu/drm/imx/dc/dc-fu.h create mode 100644 drivers/gpu/drm/imx/dc/dc-fw.c create mode 100644 drivers/gpu/drm/imx/dc/dc-ic.c create mode 100644 drivers/gpu/drm/imx/dc/dc-kms.c create mode 100644 drivers/gpu/drm/imx/dc/dc-kms.h create mode 100644 drivers/gpu/drm/imx/dc/dc-lb.c create mode 100644 drivers/gpu/drm/imx/dc/dc-pe.c create mode 100644 drivers/gpu/drm/imx/dc/dc-pe.h create mode 100644 drivers/gpu/drm/imx/dc/dc-plane.c create mode 100644 drivers/gpu/drm/imx/dc/dc-tc.c