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Thu, 19 Dec 2024 17:28:33 -0800 (PST) Received: from umbar.lan ([192.130.178.90]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-54227a89c2csm170540e87.71.2024.12.19.17.28.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Dec 2024 17:28:32 -0800 (PST) From: Dmitry Baryshkov Subject: [PATCH v2 0/8] drm/msm/dpu: catalog corrections Date: Fri, 20 Dec 2024 03:28:28 +0200 Message-Id: <20241220-dpu-fix-catalog-v2-0-38fa961ea992@linaro.org> MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIADzIZGcC/3WNzQ6CMBCEX4Xs2TXdVtF44j0Mh/4BmxBKWmw0p O9u5e7xm8l8s0PykX2CR7ND9JkTh6WCPDVgJ72MHtlVBinkhSS16NYXDvxGqzc9hxFbpZWxwhl FHupqjb7Wh/HZV544bSF+joNMv/S/KxMKpKsZxF3cnNHUzbzoGM4hjtCXUr4ZVf8irwAAAA== X-Change-ID: 20241216-dpu-fix-catalog-63a3bc0db31e To: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , Robert Foss , Neil Armstrong , Abel Vesa , Richard Acayan Cc: Rob Clark , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Johan Hovold X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1941; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=5aSCx0k8LhOK5y8eZerRNLzFjFPkZ0DBXazZ+khNng0=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBnZMg+Ye5BfK9stss01rwvB80sz3ZLaspC31dvO nXccUP4Q5CJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZ2TIPgAKCRCLPIo+Aiko 1b7iB/9VuVEl5ukn0DBd5Q5ABA4WuWvNSv1YPMUb1ge6CP4OYurqKos2RRNvRThDC08jflHGsdN I7LkL6kl6cDKWalDZv2sJt9YJnJDB0mpHPrDrgxzu66zIF/zHIJiI9RuhXL+VBz+2fFxoKNwD5Q mb/FoALFIPmJjPUnzePbZgj6OJ6Y7NpnmEnoAlQqmiQqVwpNMorDtLVc1HakOeHZwsc78hZRh0F GC0wQR4b/3lyI2ohOrBNM6/zx2Hs594/Z8VU5IyyvwEXsiTTeMLZaEh1JHXgogIqsUA0jnk7qsA LdC12gJgQ/cioxtCkjm5SET83js6BsVxDsvR99UZLa0POBfF X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" After checking the DSPP units in the catalog vs the vendor devicetrees, link several DSPP units to the corresponding LM units. Each correction is submitted separately in order to be able to track and apply / skip them separately based on the feedback from Qualcomm. I think at this point only CrOS compositor actually uses CTM, so these changes do not need to be backported (none of the CrOS-enabled devices are touched by these patches). Signed-off-by: Dmitry Baryshkov --- Changes in v2: - Expanded commit messages to mention the resulting effect (Johan) - Move the SDM670 fix to the top of the series - Link to v1: https://lore.kernel.org/r/20241216-dpu-fix-catalog-v1-0-15bf0807dba1@linaro.org --- Dmitry Baryshkov (8): drm/msm/dpu: provide DSPP and correct LM config for SDM670 drm/msm/dpu: link DSPP_2/_3 blocks on SM8150 drm/msm/dpu: link DSPP_2/_3 blocks on SC8180X drm/msm/dpu: link DSPP_2/_3 blocks on SM8250 drm/msm/dpu: link DSPP_2/_3 blocks on SM8350 drm/msm/dpu: link DSPP_2/_3 blocks on SM8550 drm/msm/dpu: link DSPP_2/_3 blocks on SM8650 drm/msm/dpu: link DSPP_2/_3 blocks on X1E80100 .../drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h | 2 + .../gpu/drm/msm/disp/dpu1/catalog/dpu_4_1_sdm670.h | 54 +++++++++++++++++++++- .../gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h | 2 + .../drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h | 2 + .../gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h | 2 + .../gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h | 2 + .../gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h | 2 + .../drm/msm/disp/dpu1/catalog/dpu_9_2_x1e80100.h | 2 + 8 files changed, 66 insertions(+), 2 deletions(-) --- base-commit: d82c9281189d2b27642ede2760db495379503b86 change-id: 20241216-dpu-fix-catalog-63a3bc0db31e Best regards,