From patchwork Wed Jun 29 15:25:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mauro Carvalho Chehab X-Patchwork-Id: 12900308 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A4922CCA47C for ; Wed, 29 Jun 2022 15:25:41 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A4B8B10E487; Wed, 29 Jun 2022 15:25:33 +0000 (UTC) Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9E4BF10E389; Wed, 29 Jun 2022 15:25:31 +0000 (UTC) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 2052560F4A; Wed, 29 Jun 2022 15:25:31 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 87F54C385A9; Wed, 29 Jun 2022 15:25:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1656516330; bh=ILwnLBcL9ZfmgSD5+XbPsEEk0PHDWrcfV9GaKkubGWc=; h=From:To:Cc:Subject:Date:From; b=K6TZ27g/mbEVpHu5MOTOZ5XGdg62fa3TijkQtP959qyJsjSgYEJAwJe4DQUWdg5Ih 58DQaCM4CqiQhjLjQPzQfMgod1eodllUTurx/CYU6MumGduPEfE+k1lNGd7fa+khYm u9MQ5Z8igz8+FWH+gjEqWDBchSGxndlKYGnbxp1cvfJv0BRq5PKPAILBuMav38EXV8 IImPIku/3iwS7iLOvZZ1XFqER2LBqz7rkXcXfOsq9BTgGMoHqV7YG3XgFxeSwUztXS 27Mi6jKMknJCdn+xhhpq2RUdY1msoLoWFwnvWUiVsJknJiA8I2vQAGvcs78/dwKUO4 inycICzTa55HQ== Received: from mchehab by mail.kernel.org with local (Exim 4.95) (envelope-from ) id 1o6ZZH-005hFF-N7; Wed, 29 Jun 2022 16:25:27 +0100 From: Mauro Carvalho Chehab To: Subject: [PATCH v2 0/3] Fix TLB invalidate issues with Broadwell Date: Wed, 29 Jun 2022 16:25:23 +0100 Message-Id: X-Mailer: git-send-email 2.36.1 MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Airlie , dri-devel@lists.freedesktop.org, Daniele Ceraolo Spurio , Jason Ekstrand , Matthew Brost , Chris Wilson , Matthew Auld , Andi Shyti , Dave Airlie , =?utf-8?q?Thomas_Hellstr=C3=B6m?= , Lucas De Marchi , intel-gfx@lists.freedesktop.org, Oak Zeng , Rodrigo Vivi , Mauro Carvalho Chehab , Tvrtko Ursulin , linux-kernel@vger.kernel.org, Bruce Chang , Tejas Upadhyay , Umesh Nerlige Ramappa , John Harrison Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" i915 selftest hangcheck is causing the i915 driver timeouts, as reported by Intel CI bot: http://gfx-ci.fi.intel.com/cibuglog-ng/issuefilterassoc/24297?query_key=42a999f48fa6ecce068bc8126c069be7c31153b4 When such test runs, the only output is: [ 68.811639] i915: Performing live selftests with st_random_seed=0xe138eac7 st_timeout=500 [ 68.811792] i915: Running hangcheck [ 68.811859] i915: Running intel_hangcheck_live_selftests/igt_hang_sanitycheck [ 68.816910] i915 0000:00:02.0: [drm] Cannot find any crtc or sizes [ 68.841597] i915: Running intel_hangcheck_live_selftests/igt_reset_nop [ 69.346347] igt_reset_nop: 80 resets [ 69.362695] i915: Running intel_hangcheck_live_selftests/igt_reset_nop_engine [ 69.863559] igt_reset_nop_engine(rcs0): 709 resets [ 70.364924] igt_reset_nop_engine(bcs0): 903 resets [ 70.866005] igt_reset_nop_engine(vcs0): 659 resets [ 71.367934] igt_reset_nop_engine(vcs1): 549 resets [ 71.869259] igt_reset_nop_engine(vecs0): 553 resets [ 71.882592] i915: Running intel_hangcheck_live_selftests/igt_reset_idle_engine [ 72.383554] rcs0: Completed 16605 idle resets [ 72.884599] bcs0: Completed 18641 idle resets [ 73.385592] vcs0: Completed 17517 idle resets [ 73.886658] vcs1: Completed 15474 idle resets [ 74.387600] vecs0: Completed 17983 idle resets [ 74.387667] i915: Running intel_hangcheck_live_selftests/igt_reset_active_engine [ 74.889017] rcs0: Completed 747 active resets [ 75.174240] intel_engine_reset(bcs0) failed, err:-110 [ 75.174301] bcs0: Completed 525 active resets After that, the machine just silently hangs. Bisecting the issue, the patch that introduced the regression is: 7938d61591d3 ("drm/i915: Flush TLBs before releasing backing store") Reverting it fix the issues, but introduce other problems, as TLB won't be invalidated anymore. So, instead, let's fix the root cause. It turns that the TLB flush logic ends conflicting with i915 reset, which is called during selftest hangcheck. So, the TLB cache should be serialized, but other TLB fix patches are required for this one to work. Tested on an Intel NUC5i7RYB with an i7-5557U Broadwell CPU. v2: - Reduced to bare minimum fixes, as this shoud be backported deeply into stable. Chris Wilson (3): drm/i915/gt: Ignore TLB invalidations on idle engines drm/i915/gt: Serialize GRDOM access between multiple engine resets drm/i915/gt: Serialize TLB invalidates with GT resets drivers/gpu/drm/i915/gem/i915_gem_pages.c | 10 +++--- drivers/gpu/drm/i915/gt/intel_gt.c | 30 +++++++++++++----- drivers/gpu/drm/i915/gt/intel_gt_pm.h | 3 ++ drivers/gpu/drm/i915/gt/intel_reset.c | 37 +++++++++++++++++------ 4 files changed, 60 insertions(+), 20 deletions(-)