Show patches with: Series = [v4,1/5] drm/bridge: tc358767: Split tc_pxl_pll_en() into parameter calculation and enablement       |   5 patches
Patch Series A/R/T S/W/F Date Submitter Delegate State
[v4,5/5] Revert "drm/bridge: tc358767: Set default CLRSIPO count" [v4,1/5] drm/bridge: tc358767: Split tc_pxl_pll_en() into parameter calculation and enablement - 1 - --- 2024-06-25 Marek Vasut Accepted
[v4,4/5] drm/bridge: tc358767: Set LSCLK divider for SYSCLK to 1 [v4,1/5] drm/bridge: tc358767: Split tc_pxl_pll_en() into parameter calculation and enablement - 1 - --- 2024-06-25 Marek Vasut Accepted
[v4,3/5] drm/bridge: tc358767: Drop line_pixel_subtract [v4,1/5] drm/bridge: tc358767: Split tc_pxl_pll_en() into parameter calculation and enablement - 1 - --- 2024-06-25 Marek Vasut Accepted
[v4,2/5] drm/bridge: tc358767: Use tc_pxl_pll_calc() to correct adjusted_mode clock [v4,1/5] drm/bridge: tc358767: Split tc_pxl_pll_en() into parameter calculation and enablement - 1 - --- 2024-06-25 Marek Vasut Accepted
[v4,1/5] drm/bridge: tc358767: Split tc_pxl_pll_en() into parameter calculation and enablement [v4,1/5] drm/bridge: tc358767: Split tc_pxl_pll_en() into parameter calculation and enablement - 1 - --- 2024-06-25 Marek Vasut Accepted