From patchwork Fri Feb 15 08:13:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: kernel test robot via dri-devel X-Patchwork-Id: 10816685 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7D37D17D5 for ; Sat, 16 Feb 2019 20:15:15 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6D9BA2AD6D for ; Sat, 16 Feb 2019 20:15:15 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 61FCD2AE66; Sat, 16 Feb 2019 20:15:15 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id B332A2AD6D for ; Sat, 16 Feb 2019 20:15:14 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 639526EB8D; Sat, 16 Feb 2019 20:12:05 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by gabe.freedesktop.org (Postfix) with ESMTPS id 142576E028 for ; Fri, 15 Feb 2019 08:13:24 +0000 (UTC) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id x1F8DLlj128398; Fri, 15 Feb 2019 02:13:21 -0600 Received: from DLEE100.ent.ti.com (dlee100.ent.ti.com [157.170.170.30]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x1F8DLdr069612 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 15 Feb 2019 02:13:21 -0600 Received: from DLEE115.ent.ti.com (157.170.170.26) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1591.10; Fri, 15 Feb 2019 02:13:20 -0600 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1591.10 via Frontend Transport; Fri, 15 Feb 2019 02:13:20 -0600 Received: from jadmar.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id x1F8DGjC010211; Fri, 15 Feb 2019 02:13:19 -0600 To: Subject: [PATCH 2/2] drm/tilcdc: Remove unnecessary struct tilcdc_panel_info members Date: Fri, 15 Feb 2019 10:13:16 +0200 Message-ID: <0f868342c2e341ceadba4bf08f9ef042fee7b18e.1550217735.git.jsarha@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1550218401; bh=F/fXDPg/pTQQD8GIRc8yuqB5VknsPqpknUCEn/BG4pQ=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=Iv2+4Mm3yLXHdh9dVx1qYB7tUzQ5oI0J7XOtTO/Tf5e7eymMiT1KWaek9SkPsHliU t2cn+TLSdZ9g94yA9TNr43ZtriqX5SyoWWXU8EsgRRtx6XEuRcmNbb1TDfqXj1IQkV CusoyDmEIK5APt45RzO+n6wUaxmgXc6l383APFms= X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Jyri Sarha via dri-devel From: kernel test robot via dri-devel Reply-To: Jyri Sarha Cc: tomi.valkeinen@ti.com, lcpd_audiovideo@list.ti.com, laurent.pinchart@ideasonboard.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Most of the struct tilcdc_panel_info data members, that are also exposed in dts binding, are essentially display IP register bits that should not need customization per connected display basis. This patch removes them, both from the binding and the struct. The removed data members have sane static values and there should be no need to expose them in the device tree, certainly not in the panel node. The removed data members are: ac_bias, ac_bias_intrpt, dma_burst_sz, bpp, fdd, sync-ctrl, tft_alt_mode, and raster_order. All of those are removed from the driver implementation and from bundled tilcdc panel binding. The driver now configures the tilcdc with the sane static values, instead of whatever the driver finds from the struct tilcdc_panel_info. The patch does does not cause any functional change to any platform supported by Linux mainline kernel and devicetree files. Signed-off-by: Jyri Sarha --- .../bindings/display/tilcdc/panel.txt | 20 +++++--- drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 50 +++++-------------- drivers/gpu/drm/tilcdc/tilcdc_drv.h | 27 ---------- drivers/gpu/drm/tilcdc/tilcdc_external.c | 16 ------ drivers/gpu/drm/tilcdc/tilcdc_panel.c | 9 ---- drivers/gpu/drm/tilcdc/tilcdc_tfp410.c | 8 --- 6 files changed, 24 insertions(+), 106 deletions(-) diff --git a/Documentation/devicetree/bindings/display/tilcdc/panel.txt b/Documentation/devicetree/bindings/display/tilcdc/panel.txt index 808216310ea2..b3d63e3db714 100644 --- a/Documentation/devicetree/bindings/display/tilcdc/panel.txt +++ b/Documentation/devicetree/bindings/display/tilcdc/panel.txt @@ -3,15 +3,19 @@ Device-Tree bindings for tilcdc DRM generic panel output driver Required properties: - compatible: value should be "ti,tilcdc,panel". - panel-info: configuration info to configure LCDC correctly for the panel - - ac-bias: AC Bias Pin Frequency - - ac-bias-intrpt: AC Bias Pin Transitions per Interrupt - - dma-burst-sz: DMA burst size - - bpp: Bits per pixel - - fdd: FIFO DMA Request Delay - sync-edge: Horizontal and Vertical Sync Edge: 0=rising 1=falling - - sync-ctrl: Horizontal and Vertical Sync: Control: 0=ignore - - raster-order: Raster Data Order Select: 1=Most-to-least 0=Least-to-most - - fifo-th: DMA FIFO threshold + + - For compatibility with the older driver versions it is still good + keep these obsolete properties (with their recommended vaules): + - ac-bias = <255>; + - ac-bias-intrpt = <0>; + - dma-burst-sz = <16>; + - bpp = <16>; + - fdd = <0x80>; + - sync-ctrl = <1>; + - raster-order = <0>; + - fifo-th = <0>; + - display-timings: typical videomode of lcd panel. Multiple video modes can be listed if the panel supports multiple timings, but the 'native-mode' should be the preferred/default resolution. Refer to diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c index 1067e702c22c..ea2e4afad75c 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c @@ -295,29 +295,11 @@ static void tilcdc_crtc_set_mode(struct drm_crtc *crtc) return; /* Configure the Burst Size and fifo threshold of DMA: */ - reg = tilcdc_read(dev, LCDC_DMA_CTRL_REG) & ~0x00000770; - switch (info->dma_burst_sz) { - case 1: - reg |= LCDC_DMA_BURST_SIZE(LCDC_DMA_BURST_1); - break; - case 2: - reg |= LCDC_DMA_BURST_SIZE(LCDC_DMA_BURST_2); - break; - case 4: - reg |= LCDC_DMA_BURST_SIZE(LCDC_DMA_BURST_4); - break; - case 8: - reg |= LCDC_DMA_BURST_SIZE(LCDC_DMA_BURST_8); - break; - case 16: - reg |= LCDC_DMA_BURST_SIZE(LCDC_DMA_BURST_16); - break; - default: - dev_err(dev->dev, "invalid burst size\n"); - return; - } - reg |= (info->fifo_th << 8); - tilcdc_write(dev, LCDC_DMA_CTRL_REG, reg); + tilcdc_write_mask(dev, LCDC_DMA_CTRL_REG, + LCDC_DMA_FIFO_THRESHOLD(0) | + LCDC_DMA_BURST_SIZE(LCDC_DMA_BURST_16), + LCDC_DMA_FIFO_THRESHOLD_MASK | + LCDC_DMA_BURST_SIZE_MASK); /* Configure timings: */ hbp = mode->htotal - mode->hsync_end; @@ -331,9 +313,11 @@ static void tilcdc_crtc_set_mode(struct drm_crtc *crtc) mode->hdisplay, mode->vdisplay, hbp, hfp, hsw, vbp, vfp, vsw); /* Set AC Bias Period and Number of Transitions per Interrupt: */ - reg = tilcdc_read(dev, LCDC_RASTER_TIMING_2_REG) & ~0x000fff00; - reg |= LCDC_AC_BIAS_FREQUENCY(info->ac_bias) | - LCDC_AC_BIAS_TRANSITIONS_PER_INT(info->ac_bias_intrpt); + reg = tilcdc_read(dev, LCDC_RASTER_TIMING_2_REG); + reg &= ~LCDC_AC_BIAS_FREQUENCY_MASK; + reg |= LCDC_AC_BIAS_FREQUENCY(255); + reg &= ~LCDC_AC_BIAS_TRANSITIONS_PER_INT_MASK; + reg |= LCDC_AC_BIAS_TRANSITIONS_PER_INT(0); /* * subtract one from hfp, hbp, hsw because the hardware uses @@ -383,8 +367,6 @@ static void tilcdc_crtc_set_mode(struct drm_crtc *crtc) LCDC_V2_TFT_24BPP_MODE | LCDC_V2_TFT_24BPP_UNPACK | 0x000ff000 /* Palette Loading Delay bits */); reg |= LCDC_TFT_MODE; /* no monochrome/passive support */ - if (info->tft_alt_mode) - reg |= LCDC_TFT_ALT_ENABLE; if (priv->rev == 2) { switch (fb->format->format) { case DRM_FORMAT_BGR565: @@ -403,7 +385,6 @@ static void tilcdc_crtc_set_mode(struct drm_crtc *crtc) return; } } - reg |= info->fdd < 12; tilcdc_write(dev, LCDC_RASTER_CTRL_REG, reg); if (info->invert_pxl_clk) @@ -411,10 +392,8 @@ static void tilcdc_crtc_set_mode(struct drm_crtc *crtc) else tilcdc_clear(dev, LCDC_RASTER_TIMING_2_REG, LCDC_INVERT_PIXEL_CLOCK); - if (info->sync_ctrl) - tilcdc_set(dev, LCDC_RASTER_TIMING_2_REG, LCDC_SYNC_CTRL); - else - tilcdc_clear(dev, LCDC_RASTER_TIMING_2_REG, LCDC_SYNC_CTRL); + /* Take sync polarity from LCDC_SYNC_EDGE bit */ + tilcdc_set(dev, LCDC_RASTER_TIMING_2_REG, LCDC_SYNC_CTRL); if (info->sync_edge) tilcdc_set(dev, LCDC_RASTER_TIMING_2_REG, LCDC_SYNC_EDGE); @@ -431,11 +410,6 @@ static void tilcdc_crtc_set_mode(struct drm_crtc *crtc) else tilcdc_clear(dev, LCDC_RASTER_TIMING_2_REG, LCDC_INVERT_VSYNC); - if (info->raster_order) - tilcdc_set(dev, LCDC_RASTER_CTRL_REG, LCDC_RASTER_ORDER); - else - tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, LCDC_RASTER_ORDER); - tilcdc_crtc_set_clk(crtc); tilcdc_crtc_load_palette(crtc); diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.h b/drivers/gpu/drm/tilcdc/tilcdc_drv.h index 62cea5ff5558..acf27e22c409 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_drv.h +++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.h @@ -125,38 +125,11 @@ void tilcdc_module_cleanup(struct tilcdc_module *mod); */ struct tilcdc_panel_info { - /* AC Bias Pin Frequency */ - uint32_t ac_bias; - - /* AC Bias Pin Transitions per Interrupt */ - uint32_t ac_bias_intrpt; - - /* DMA burst size */ - uint32_t dma_burst_sz; - - /* Bits per pixel */ - uint32_t bpp; - - /* FIFO DMA Request Delay */ - uint32_t fdd; - - /* TFT Alternative Signal Mapping (Only for active) */ - bool tft_alt_mode; - /* Invert pixel clock */ bool invert_pxl_clk; /* Horizontal and Vertical Sync Edge: 0=rising 1=falling */ uint32_t sync_edge; - - /* Horizontal and Vertical Sync: Control: 0=ignore */ - uint32_t sync_ctrl; - - /* Raster Data Order Select: 1=Most-to-least 0=Least-to-most */ - uint32_t raster_order; - - /* DMA FIFO threshold */ - uint32_t fifo_th; }; #define DBG(fmt, ...) DRM_DEBUG(fmt"\n", ##__VA_ARGS__) diff --git a/drivers/gpu/drm/tilcdc/tilcdc_external.c b/drivers/gpu/drm/tilcdc/tilcdc_external.c index b4eaf9bc87f8..9626cccf0d17 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_external.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_external.c @@ -16,28 +16,12 @@ #include "tilcdc_external.h" static const struct tilcdc_panel_info panel_info_tda998x = { - .ac_bias = 255, - .ac_bias_intrpt = 0, - .dma_burst_sz = 16, - .bpp = 16, - .fdd = 0x80, - .tft_alt_mode = 0, .invert_pxl_clk = 1, .sync_edge = 1, - .sync_ctrl = 1, - .raster_order = 0, }; static const struct tilcdc_panel_info panel_info_default = { - .ac_bias = 255, - .ac_bias_intrpt = 0, - .dma_burst_sz = 16, - .bpp = 16, - .fdd = 0x80, - .tft_alt_mode = 0, .sync_edge = 0, - .sync_ctrl = 1, - .raster_order = 0, }; static int tilcdc_external_mode_valid(struct drm_connector *connector, diff --git a/drivers/gpu/drm/tilcdc/tilcdc_panel.c b/drivers/gpu/drm/tilcdc/tilcdc_panel.c index a1acab39d87f..1f788171cdbb 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_panel.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_panel.c @@ -292,18 +292,9 @@ static struct tilcdc_panel_info *of_get_panel_info(struct device_node *np) if (!info) goto put_node; - ret |= of_property_read_u32(info_np, "ac-bias", &info->ac_bias); - ret |= of_property_read_u32(info_np, "ac-bias-intrpt", &info->ac_bias_intrpt); - ret |= of_property_read_u32(info_np, "dma-burst-sz", &info->dma_burst_sz); - ret |= of_property_read_u32(info_np, "bpp", &info->bpp); - ret |= of_property_read_u32(info_np, "fdd", &info->fdd); ret |= of_property_read_u32(info_np, "sync-edge", &info->sync_edge); - ret |= of_property_read_u32(info_np, "sync-ctrl", &info->sync_ctrl); - ret |= of_property_read_u32(info_np, "raster-order", &info->raster_order); - ret |= of_property_read_u32(info_np, "fifo-th", &info->fifo_th); /* optional: */ - info->tft_alt_mode = of_property_read_bool(info_np, "tft-alt-mode"); info->invert_pxl_clk = of_property_read_bool(info_np, "invert-pxl-clk"); if (ret) { diff --git a/drivers/gpu/drm/tilcdc/tilcdc_tfp410.c b/drivers/gpu/drm/tilcdc/tilcdc_tfp410.c index daebf1aa6b0a..12404401b337 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_tfp410.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_tfp410.c @@ -34,15 +34,7 @@ struct tfp410_module { static const struct tilcdc_panel_info dvi_info = { - .ac_bias = 255, - .ac_bias_intrpt = 0, - .dma_burst_sz = 16, - .bpp = 16, - .fdd = 0x80, - .tft_alt_mode = 0, .sync_edge = 0, - .sync_ctrl = 1, - .raster_order = 0, }; /*