From patchwork Fri Feb 1 08:49:54 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Guido_G=C3=BCnther?= X-Patchwork-Id: 10792207 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3117F17E9 for ; Fri, 1 Feb 2019 08:50:03 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 21B7D31B50 for ; Fri, 1 Feb 2019 08:50:03 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 13D8931B8C; Fri, 1 Feb 2019 08:50:03 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 6326331B50 for ; Fri, 1 Feb 2019 08:50:02 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 190796EDF4; Fri, 1 Feb 2019 08:50:00 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from honk.sigxcpu.org (honk.sigxcpu.org [24.134.29.49]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4B9616EDF4 for ; Fri, 1 Feb 2019 08:49:59 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by honk.sigxcpu.org (Postfix) with ESMTP id E46EDFB03; Fri, 1 Feb 2019 09:49:57 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at honk.sigxcpu.org Received: from honk.sigxcpu.org ([127.0.0.1]) by localhost (honk.sigxcpu.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id c9bpIqNCVqFh; Fri, 1 Feb 2019 09:49:56 +0100 (CET) Received: by bogon.sigxcpu.org (Postfix, from userid 1000) id 885E1461BD; Fri, 1 Feb 2019 09:49:55 +0100 (CET) From: =?utf-8?q?Guido_G=C3=BCnther?= To: Maxime Ripard , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, Robert Chiras , Sam Ravnborg , Fabio Estevam Subject: [PATCH v2 2/3] dt-bindings: phy: Add documentation for mixel dphy Date: Fri, 1 Feb 2019 09:49:54 +0100 Message-Id: <107cd5e7f44f5361db64115530e228ba5993e692.1549010639.git.agx@sigxcpu.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Add support for the MIXEL DPHY IP as found in the NXP's i.MX8MQ. Signed-off-by: Guido Günther Reviewed-by: Sam Ravnborg --- .../bindings/phy/mixel,mipi-dsi-phy.txt | 29 +++++++++++++++++++ 1 file changed, 29 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.txt diff --git a/Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.txt b/Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.txt new file mode 100644 index 000000000000..10323ae8ee37 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.txt @@ -0,0 +1,29 @@ +Mixel DSI PHY for i.MX8 + +The Mixel MIPI-DSI PHY IP block is e.g. found on MX8 platforms (along +the MIPI-DSI IP from Northwest Logic). It represents the physical +layer for the electrical signals for DSI. + +Required properties: +- compatible: Must be: + - "mixel,imx8mq-mipi-dphy" +- clocks: Must contain an entry for each entry in clock-names. +- clock-names: Must contain the following entries: + - "phy_ref": phandle and specifier referring to the DPHY ref clock +- reg: the register range of the PHY controller +- #phy-cells: number of cells in PHY, as defined in + Documentation/devicetree/bindings/phy/phy-bindings.txt + this must be <0> + +Optional properties: +- power-domains: phandle to power domain + +Example: + mipi_dphy: mipi_dphy@30A0030 { + compatible = "mixel,imx8mq-mipi-dphy"; + clocks = <&clk IMX8MQ_CLK_DSI_PHY_REF>; + clock-names = "phy_ref"; + reg = <0x30A00300 0x100>; + power-domains = <&pd_mipi0>; + #phy-cells = <0>; + };