From patchwork Sat Mar 6 13:03:35 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= X-Patchwork-Id: 83902 Received: from lists.sourceforge.net (lists.sourceforge.net [216.34.181.88]) by demeter.kernel.org (8.14.3/8.14.3) with ESMTP id o26D4WQX021245 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Sat, 6 Mar 2010 13:05:08 GMT Received: from localhost ([127.0.0.1] helo=sfs-ml-3.v29.ch3.sourceforge.com) by sfs-ml-3.v29.ch3.sourceforge.com with esmtp (Exim 4.69) (envelope-from ) id 1NntfP-0000xf-MC; Sat, 06 Mar 2010 13:03:39 +0000 Received: from sfi-mx-3.v28.ch3.sourceforge.com ([172.29.28.123] helo=mx.sourceforge.net) by sfs-ml-3.v29.ch3.sourceforge.com with esmtp (Exim 4.69) (envelope-from ) id 1NntfO-0000xI-ES for dri-devel@lists.sourceforge.net; Sat, 06 Mar 2010 13:03:38 +0000 Received-SPF: pass (sfi-mx-3.v28.ch3.sourceforge.com: domain of gmail.com designates 209.85.218.219 as permitted sender) client-ip=209.85.218.219; envelope-from=zajec5@gmail.com; helo=mail-bw0-f219.google.com; Received: from mail-bw0-f219.google.com ([209.85.218.219]) by sfi-mx-3.v28.ch3.sourceforge.com with esmtp (Exim 4.69) id 1NntfN-0005lo-HK for dri-devel@lists.sourceforge.net; Sat, 06 Mar 2010 13:03:38 +0000 Received: by mail-bw0-f219.google.com with SMTP id 19so1213456bwz.6 for ; Sat, 06 Mar 2010 05:03:36 -0800 (PST) Received: by 10.204.9.152 with SMTP id l24mr1238337bkl.193.1267880615540; Sat, 06 Mar 2010 05:03:35 -0800 (PST) Received: from localhost.localdomain (ara8.neoplus.adsl.tpnet.pl [83.26.186.8]) by mx.google.com with ESMTPS id 13sm139658bwz.15.2010.03.06.05.03.33 (version=TLSv1/SSLv3 cipher=RC4-MD5); Sat, 06 Mar 2010 05:03:35 -0800 (PST) From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= To: dri-devel@lists.sourceforge.net, Dave Airlie Subject: [PATCH 3/6] drm/radeon/kms: add HDMI code for pre-DCE3 R6xx GPUs Date: Sat, 6 Mar 2010 14:03:35 +0100 Message-Id: <1267880618-9909-4-git-send-email-zajec5@gmail.com> X-Mailer: git-send-email 1.6.4.2 In-Reply-To: <1267880618-9909-1-git-send-email-zajec5@gmail.com> References: <1267880618-9909-1-git-send-email-zajec5@gmail.com> MIME-Version: 1.0 X-Spam-Score: -1.5 (-) X-Spam-Report: Spam Filtering performed by mx.sourceforge.net. See http://spamassassin.org/tag/ for more details. -1.5 SPF_CHECK_PASS SPF reports sender host as permitted sender for sender-domain -0.0 SPF_PASS SPF: sender matches SPF record -0.0 DKIM_VERIFIED Domain Keys Identified Mail: signature passes verification 0.0 DKIM_SIGNED Domain Keys Identified Mail: message has a signature X-Headers-End: 1NntfN-0005lo-HK Cc: =?UTF-8?q?Christian=20K=C3=B6nig?= X-BeenThere: dri-devel@lists.sourceforge.net X-Mailman-Version: 2.1.9 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.sourceforge.net X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter.kernel.org [140.211.167.41]); Sat, 06 Mar 2010 13:05:08 +0000 (UTC) diff --git a/drivers/gpu/drm/radeon/r600_hdmi.c b/drivers/gpu/drm/radeon/r600_hdmi.c index 5275a81..8fbfc73 100644 --- a/drivers/gpu/drm/radeon/r600_hdmi.c +++ b/drivers/gpu/drm/radeon/r600_hdmi.c @@ -417,6 +417,39 @@ void r600_hdmi_update_audio_settings(struct drm_encoder *encoder, WREG32_P(offset+R600_HDMI_CNTL, 0x04000000, ~0x04000000); } +static int r600_hdmi_find_free_block(struct drm_device *dev) +{ + struct radeon_device *rdev = dev->dev_private; + struct drm_encoder *encoder; + struct radeon_encoder *radeon_encoder; + bool free_blocks[3] = { true, true, true }; + + list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { + radeon_encoder = to_radeon_encoder(encoder); + switch (radeon_encoder->hdmi_offset) { + case R600_HDMI_BLOCK1: + free_blocks[0] = false; + break; + case R600_HDMI_BLOCK2: + free_blocks[1] = false; + break; + case R600_HDMI_BLOCK3: + free_blocks[2] = false; + break; + } + } + + if (rdev->family == CHIP_RS600 || rdev->family == CHIP_RS690) { + return free_blocks[0] ? R600_HDMI_BLOCK1 : 0; + } else if (rdev->family >= CHIP_R600) { + if (free_blocks[0]) + return R600_HDMI_BLOCK1; + else if (free_blocks[1]) + return R600_HDMI_BLOCK2; + } + return 0; +} + static void r600_hdmi_assign_block(struct drm_encoder *encoder) { struct drm_device *dev = encoder->dev; @@ -437,6 +470,8 @@ static void r600_hdmi_assign_block(struct drm_encoder *encoder) if (ASIC_IS_DCE32(rdev)) radeon_encoder->hdmi_config_offset = dig->dig_encoder ? R600_HDMI_CONFIG2 : R600_HDMI_CONFIG1; + } else if (rdev->family >= CHIP_R600) { + radeon_encoder->hdmi_offset = r600_hdmi_find_free_block(dev); } } @@ -458,8 +493,24 @@ void r600_hdmi_enable(struct drm_encoder *encoder) } } - if (ASIC_IS_DCE32(rdev) && !ASIC_IS_DCE4(rdev)) + if (ASIC_IS_DCE32(rdev) && !ASIC_IS_DCE4(rdev)) { WREG32_P(radeon_encoder->hdmi_config_offset + 0x4, 0x1, ~0x1); + } else if (rdev->family >= CHIP_R600 && !ASIC_IS_DCE3(rdev)) { + int offset = radeon_encoder->hdmi_offset; + switch (radeon_encoder->encoder_id) { + case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1: + WREG32_P(AVIVO_TMDSA_CNTL, 0x4, ~0x4); + WREG32(offset + R600_HDMI_ENABLE, 0x101); + break; + case ENCODER_OBJECT_ID_INTERNAL_LVTM1: + WREG32_P(AVIVO_LVTMA_CNTL, 0x4, ~0x4); + WREG32(offset + R600_HDMI_ENABLE, 0x105); + break; + default: + dev_err(rdev->dev, "Unknown HDMI output type\n"); + break; + } + } DRM_DEBUG("Enabling HDMI interface @ 0x%04X for encoder 0x%x\n", radeon_encoder->hdmi_offset, radeon_encoder->encoder_id); @@ -482,8 +533,24 @@ void r600_hdmi_disable(struct drm_encoder *encoder) DRM_DEBUG("Disabling HDMI interface @ 0x%04X for encoder 0x%x\n", radeon_encoder->hdmi_offset, radeon_encoder->encoder_id); - if (ASIC_IS_DCE32(rdev) && !ASIC_IS_DCE4(rdev)) + if (ASIC_IS_DCE32(rdev) && !ASIC_IS_DCE4(rdev)) { WREG32_P(radeon_encoder->hdmi_config_offset + 0x4, 0, ~0x1); + } else if (rdev->family >= CHIP_R600 && !ASIC_IS_DCE3(rdev)) { + int offset = radeon_encoder->hdmi_offset; + switch (radeon_encoder->encoder_id) { + case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1: + WREG32_P(AVIVO_TMDSA_CNTL, 0, ~0x4); + WREG32(offset + R600_HDMI_ENABLE, 0); + break; + case ENCODER_OBJECT_ID_INTERNAL_LVTM1: + WREG32_P(AVIVO_LVTMA_CNTL, 0, ~0x4); + WREG32(offset + R600_HDMI_ENABLE, 0); + break; + default: + dev_err(rdev->dev, "Unknown HDMI output type\n"); + break; + } + } radeon_encoder->hdmi_offset = 0; radeon_encoder->hdmi_config_offset = 0;