From patchwork Mon Jul 11 19:45:55 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Deucher X-Patchwork-Id: 966222 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by demeter1.kernel.org (8.14.4/8.14.4) with ESMTP id p6BJluhw000940 for ; Mon, 11 Jul 2011 19:48:16 GMT Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3923DA08D3 for ; Mon, 11 Jul 2011 12:47:56 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-vw0-f49.google.com (mail-vw0-f49.google.com [209.85.212.49]) by gabe.freedesktop.org (Postfix) with ESMTP id EDE7C9F658 for ; Mon, 11 Jul 2011 12:46:03 -0700 (PDT) Received: by vws8 with SMTP id 8so3734599vws.36 for ; Mon, 11 Jul 2011 12:46:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer; bh=uvjb1Z1waV/eXP7RXRjNqLCTGSnwKei98C5JE8ymwrU=; b=t15tmaQi+ev/czfaoYKDNz6tbVTeyUvxTu8XEJCmfs4I0iSPnhwqJeDkl9DxBgd1hd pZd0CIKRKndV/m77R8+4cexnMuixitapTy6n2ux94K1TXv8UE1aCw+Kpukveq/tKIOXQ uD4jIxF7Z3p6XaLNXbmGAHcLHwGR1LOvQduPg= Received: by 10.52.98.102 with SMTP id eh6mr6000870vdb.298.1310413563140; Mon, 11 Jul 2011 12:46:03 -0700 (PDT) Received: from localhost.localdomain (static-74-96-105-7.washdc.fios.verizon.net [74.96.105.7]) by mx.google.com with ESMTPS id a12sm246943vdu.47.2011.07.11.12.46.02 (version=SSLv3 cipher=OTHER); Mon, 11 Jul 2011 12:46:02 -0700 (PDT) From: Alex Deucher To: airlied@gmail.com, dri-devel@lists.freedesktop.org Subject: [PATCH] drm/radeon/kms: fix typo in read_disabled vbios code Date: Mon, 11 Jul 2011 15:45:55 -0400 Message-Id: <1310413555-10789-1-git-send-email-alexdeucher@gmail.com> X-Mailer: git-send-email 1.7.1.1 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.11 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: dri-devel-bounces+patchwork-dri-devel=patchwork.kernel.org@lists.freedesktop.org Errors-To: dri-devel-bounces+patchwork-dri-devel=patchwork.kernel.org@lists.freedesktop.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Mon, 11 Jul 2011 19:48:22 +0000 (UTC) Rom bit changed between pre-PCIE and PCIE asics. Signed-off-by: Alex Deucher --- drivers/gpu/drm/radeon/radeon_bios.c | 7 +++++-- drivers/gpu/drm/radeon/radeon_reg.h | 3 ++- 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/radeon/radeon_bios.c b/drivers/gpu/drm/radeon/radeon_bios.c index 3fc5fa1..c2dcca5 100644 --- a/drivers/gpu/drm/radeon/radeon_bios.c +++ b/drivers/gpu/drm/radeon/radeon_bios.c @@ -350,7 +350,7 @@ static bool avivo_read_disabled_bios(struct radeon_device *rdev) WREG32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN)); /* enable the rom */ - WREG32(RADEON_BUS_CNTL, (bus_cntl & ~RADEON_BUS_BIOS_DIS_ROM)); + WREG32(RADEON_BUS_CNTL, (bus_cntl & ~RV370_BUS_BIOS_DIS_ROM)); /* Disable VGA mode */ WREG32(AVIVO_D1VGA_CONTROL, @@ -412,7 +412,10 @@ static bool legacy_read_disabled_bios(struct radeon_device *rdev) WREG32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN)); /* enable the rom */ - WREG32(RADEON_BUS_CNTL, (bus_cntl & ~RADEON_BUS_BIOS_DIS_ROM)); + if (rdev->flags & RADEON_IS_PCIE) + WREG32(RADEON_BUS_CNTL, (bus_cntl & ~RV370_BUS_BIOS_DIS_ROM)); + else + WREG32(RADEON_BUS_CNTL, (bus_cntl & ~RADEON_BUS_BIOS_DIS_ROM)); /* Turn off mem requests and CRTC for both controllers */ WREG32(RADEON_CRTC_GEN_CNTL, diff --git a/drivers/gpu/drm/radeon/radeon_reg.h b/drivers/gpu/drm/radeon/radeon_reg.h index ec93a75..115fa67 100644 --- a/drivers/gpu/drm/radeon/radeon_reg.h +++ b/drivers/gpu/drm/radeon/radeon_reg.h @@ -289,8 +289,9 @@ #define RADEON_BRUSH_SCALE 0x1470 #define RADEON_BRUSH_Y_X 0x1474 #define RADEON_BUS_CNTL 0x0030 +# define RV370_BUS_BIOS_DIS_ROM (1 << 2) /* pcie chips */ # define RADEON_BUS_MASTER_DIS (1 << 6) -# define RADEON_BUS_BIOS_DIS_ROM (1 << 12) +# define RADEON_BUS_BIOS_DIS_ROM (1 << 12) /* non-pcie chips, r1xx, r2xx, r300, r350, rv350, r420 */ # define RS600_BUS_MASTER_DIS (1 << 14) # define RS600_MSI_REARM (1 << 20) /* rs600/rs690/rs740 */ # define RADEON_BUS_RD_DISCARD_EN (1 << 24)