From patchwork Wed Jul 13 06:28:19 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Herrenschmidt X-Patchwork-Id: 973022 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by demeter1.kernel.org (8.14.4/8.14.4) with ESMTP id p6DJComh013448 for ; Wed, 13 Jul 2011 19:13:10 GMT Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D544D9E768 for ; Wed, 13 Jul 2011 12:12:49 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from gate.crashing.org (gate.crashing.org [63.228.1.57]) by gabe.freedesktop.org (Postfix) with ESMTP id B17BDA01D3; Wed, 13 Jul 2011 07:59:52 -0700 (PDT) Received: from [IPv6:::1] (localhost.localdomain [127.0.0.1]) by gate.crashing.org (8.14.1/8.13.8) with ESMTP id p6D6SOjQ024659; Wed, 13 Jul 2011 01:28:25 -0500 Subject: [PATCH 4/6] drm/radeon: Add a rmb() in IH processing From: Benjamin Herrenschmidt To: Alex Deucher Date: Wed, 13 Jul 2011 16:28:19 +1000 Message-ID: <1310538499.4968.94.camel@pasglop> Mime-Version: 1.0 X-Mailer: Evolution 2.30.3 Cc: xorg-driver-ati@lists.x.org, dri-devel@lists.freedesktop.org, Cedric Cano X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.11 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: dri-devel-bounces+patchwork-dri-devel=patchwork.kernel.org@lists.freedesktop.org Errors-To: dri-devel-bounces+patchwork-dri-devel=patchwork.kernel.org@lists.freedesktop.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Wed, 13 Jul 2011 19:13:10 +0000 (UTC) We should have a read memory barrier between reading the WPTR from memory and reading ring entries based on that value (ie, we need to ensure both loads are done in order by the CPU). It could be argued that the MMIO reads in r600_ack_irq() might be enough to get that barrier but I prefer keeping an explicit one just in case. Signed-off-by: Benjamin Herrenschmidt --- (resent adding dri-devel to the CC list to hit patchwork) drivers/gpu/drm/radeon/r600.c | 3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index 3c86b15..7e5c801 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c @@ -3312,6 +3312,9 @@ int r600_irq_process(struct radeon_device *rdev) } restart_ih: + /* Order reading of wptr vs. reading of IH ring data */ + wmb(); + /* display interrupts */ r600_irq_ack(rdev);