diff mbox

[1/7] drm/i915: Allow VGA on CRTC 2

Message ID 1344918891-6283-2-git-send-email-keithp@keithp.com
State New, archived
Headers show

Commit Message

Keith Packard Aug. 14, 2012, 4:34 a.m. UTC
This is left over from the old PLL sharing code and isn't useful now
that PLLs are shared when possible.

Signed-off-by: Keith Packard <keithp@keithp.com>
---
 drivers/gpu/drm/i915/intel_crt.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Daniel Vetter Aug. 15, 2012, 10:42 p.m. UTC | #1
On Mon, Aug 13, 2012 at 09:34:45PM -0700, Keith Packard wrote:
> This is left over from the old PLL sharing code and isn't useful now
> that PLLs are shared when possible.
> 
> Signed-off-by: Keith Packard <keithp@keithp.com>
Queued for -next, thanks for the patch. I'll hold off a bit on the others
until it's a bit clearer what's going on/wrong.
-Daniel
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index bc5e2c9..7997b24 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -664,7 +664,7 @@  void intel_crt_init(struct drm_device *dev)
 	if (IS_HASWELL(dev))
 		crt->base.crtc_mask = (1 << 0);
 	else
-		crt->base.crtc_mask = (1 << 0) | (1 << 1);
+		crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
 
 	if (IS_GEN2(dev))
 		connector->interlace_allowed = 0;