From patchwork Wed Aug 15 21:59:19 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Deucher X-Patchwork-Id: 1328851 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork1.kernel.org (Postfix) with ESMTP id 970EC3FD8C for ; Wed, 15 Aug 2012 21:59:46 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 58CA29EB4A for ; Wed, 15 Aug 2012 14:59:46 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-yw0-f49.google.com (mail-yw0-f49.google.com [209.85.213.49]) by gabe.freedesktop.org (Postfix) with ESMTP id 25D389E7B3 for ; Wed, 15 Aug 2012 14:59:34 -0700 (PDT) Received: by yhjj52 with SMTP id j52so2468990yhj.36 for ; Wed, 15 Aug 2012 14:59:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=fqDP2QF1RVcWjCBAxk5Ilybed0p48VyHAx8Omt0mnmk=; b=fuMwCffai2hrU+kROzYeHtOL9xxCRxYN87m0PkQe1wbFX9RNUNvzHA3mcgQGVPQ3Ov SQKvg5fIbbScDfsftXaxgohrZtcoC6/bK7+a86BceovbhDclk/iaAzfKGRnzuMpiAvSf j7Z4T5u+uY2TdtOVVHr+1SnDV2nDdEmPQ9cZdclLiZ1VKyCPSgM3WA+GtY5XRVCnNXYB Who67ax5jnjcRaY+cO5MIkN9OI0QLAbbf8224OGvq6rzTBd+4nBTwASIKnUD9Id+ht5w Lagqqs2VZhy/tCDlowdp6fnoI8CqrM5tIv1lq4uo/XUXcffWekYNqvEJYkLwMwxOsVzM jklg== Received: by 10.236.173.34 with SMTP id u22mr21624330yhl.100.1345067973604; Wed, 15 Aug 2012 14:59:33 -0700 (PDT) Received: from localhost.localdomain (static-74-96-105-49.washdc.fios.verizon.net. [74.96.105.49]) by mx.google.com with ESMTPS id t16sm2603189anj.21.2012.08.15.14.59.32 (version=SSLv3 cipher=OTHER); Wed, 15 Aug 2012 14:59:32 -0700 (PDT) From: alexdeucher@gmail.com To: airlied@gmail.com, dri-devel@lists.freedesktop.org Subject: [PATCH 4/5] drm/radeon/r5xx-r7xx: don't use radeon_crtc for vblank callback (v2) Date: Wed, 15 Aug 2012 17:59:19 -0400 Message-Id: <1345067959-19876-1-git-send-email-alexdeucher@gmail.com> X-Mailer: git-send-email 1.7.7.5 In-Reply-To: <1345066573-1492-4-git-send-email-alexdeucher@gmail.com> References: <1345066573-1492-4-git-send-email-alexdeucher@gmail.com> Cc: Alex Deucher X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: dri-devel-bounces+patchwork-dri-devel=patchwork.kernel.org@lists.freedesktop.org Errors-To: dri-devel-bounces+patchwork-dri-devel=patchwork.kernel.org@lists.freedesktop.org From: Alex Deucher This might be called before we've allocated the radeon_crtcs v2: fix typo in array size Signed-off-by: Alex Deucher --- drivers/gpu/drm/radeon/rs600.c | 16 ++++++++++++---- 1 files changed, 12 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c index 5301b3d..31b84b6 100644 --- a/drivers/gpu/drm/radeon/rs600.c +++ b/drivers/gpu/drm/radeon/rs600.c @@ -46,19 +46,27 @@ void rs600_gpu_init(struct radeon_device *rdev); int rs600_mc_wait_for_idle(struct radeon_device *rdev); +static const u32 crtc_offsets[2] = +{ + 0, + AVIVO_D2CRTC_H_TOTAL - AVIVO_D1CRTC_H_TOTAL +}; + void avivo_wait_for_vblank(struct radeon_device *rdev, int crtc) { - struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc]; int i; - if (RREG32(AVIVO_D1CRTC_CONTROL + radeon_crtc->crtc_offset) & AVIVO_CRTC_EN) { + if (crtc >= rdev->num_crtc) + return; + + if (RREG32(AVIVO_D1CRTC_CONTROL + crtc_offsets[crtc]) & AVIVO_CRTC_EN) { for (i = 0; i < rdev->usec_timeout; i++) { - if (!(RREG32(AVIVO_D1CRTC_STATUS + radeon_crtc->crtc_offset) & AVIVO_D1CRTC_V_BLANK)) + if (!(RREG32(AVIVO_D1CRTC_STATUS + crtc_offsets[crtc]) & AVIVO_D1CRTC_V_BLANK)) break; udelay(1); } for (i = 0; i < rdev->usec_timeout; i++) { - if (RREG32(AVIVO_D1CRTC_STATUS + radeon_crtc->crtc_offset) & AVIVO_D1CRTC_V_BLANK) + if (RREG32(AVIVO_D1CRTC_STATUS + crtc_offsets[crtc]) & AVIVO_D1CRTC_V_BLANK) break; udelay(1); }