From patchwork Sun Aug 19 19:23:26 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TWFyZWsgT2zFocOhaw==?= X-Patchwork-Id: 1344671 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id 5878CDF264 for ; Sun, 19 Aug 2012 19:23:48 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 65EB9A0FEB for ; Sun, 19 Aug 2012 12:23:47 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-wg0-f41.google.com (mail-wg0-f41.google.com [74.125.82.41]) by gabe.freedesktop.org (Postfix) with ESMTP id 7B70FA0FB1 for ; Sun, 19 Aug 2012 12:23:37 -0700 (PDT) Received: by wgbds1 with SMTP id ds1so2649945wgb.0 for ; Sun, 19 Aug 2012 12:23:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:subject:date:message-id:x-mailer:mime-version:content-type :content-transfer-encoding; bh=akPdB3WLEd7FdiKhDzdbRO95cxM2HzFefVAdFlYn+iU=; b=Lr0mw+0UdbHYVivD5i9My+MNXnZeXOAXCB1qgkugUP2tFxtimKdpiC4x1d4ExuYlbd sSpB5u9fnVlfOpSj5jdekRAtCe5pvFv4E6Atxfpe2QW4SSu0BJk3VIcEy00D79o9ap07 KLYev5TYSap2EMFeBIvvfCddlsmjSXJp0WP1ii4mkQNLjOGy/P4PSKp5eI6nG+Gwlys0 lem1XqG4H79dd2VpKcNt1WAb91ti89TzFuI11Om1dO5OIUod4w3fIqRiF+XW44jMMcFw 3pcUcOfFsEHEmy6A5ubZ5EIXujipBN6PWmp+0NlXQrdtcGnMrAu1vuWHJmQWWdGf37iu W4VQ== Received: by 10.180.78.170 with SMTP id c10mr21778074wix.3.1345404216585; Sun, 19 Aug 2012 12:23:36 -0700 (PDT) Received: from localhost.localdomain (static-84-242-70-218.net.upcbroadband.cz. [84.242.70.218]) by mx.google.com with ESMTPS id k20sm23973695wiv.11.2012.08.19.12.23.34 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 19 Aug 2012 12:23:35 -0700 (PDT) From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= To: dri-devel@lists.freedesktop.org Subject: [PATCH] drm/radeon: fix checking of MSAA renderbuffers on r600-r700 Date: Sun, 19 Aug 2012 21:23:26 +0200 Message-Id: <1345404206-22282-1-git-send-email-maraeo@gmail.com> X-Mailer: git-send-email 1.7.9.5 MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: dri-devel-bounces+patchwork-dri-devel=patchwork.kernel.org@lists.freedesktop.org Errors-To: dri-devel-bounces+patchwork-dri-devel=patchwork.kernel.org@lists.freedesktop.org Signed-off-by: Marek Olšák --- drivers/gpu/drm/radeon/r600_cs.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c index 1bec5b8..ab74e6b 100644 --- a/drivers/gpu/drm/radeon/r600_cs.c +++ b/drivers/gpu/drm/radeon/r600_cs.c @@ -420,7 +420,8 @@ static int r600_cs_track_validate_cb(struct radeon_cs_parser *p, int i) } /* check offset */ - tmp = r600_fmt_get_nblocksy(format, height) * r600_fmt_get_nblocksx(format, pitch) * r600_fmt_get_blocksize(format); + tmp = r600_fmt_get_nblocksy(format, height) * r600_fmt_get_nblocksx(format, pitch) * + r600_fmt_get_blocksize(format) * track->nsamples; switch (array_mode) { default: case V_0280A0_ARRAY_LINEAR_GENERAL: @@ -611,7 +612,7 @@ static int r600_cs_track_validate_db(struct radeon_cs_parser *p) ntiles = G_028000_SLICE_TILE_MAX(track->db_depth_size) + 1; nviews = G_028004_SLICE_MAX(track->db_depth_view) + 1; - tmp = ntiles * bpe * 64 * nviews; + tmp = ntiles * bpe * 64 * nviews * track->nsamples; if ((tmp + track->db_offset) > radeon_bo_size(track->db_bo)) { dev_warn(p->dev, "z/stencil buffer (%d) too small (0x%08X %d %d %d -> %u have %lu)\n", array_mode, @@ -1562,7 +1563,7 @@ unsigned r600_mip_minify(unsigned size, unsigned level) } static void r600_texture_size(unsigned nfaces, unsigned blevel, unsigned llevel, - unsigned w0, unsigned h0, unsigned d0, unsigned format, + unsigned w0, unsigned h0, unsigned d0, unsigned nsamples, unsigned format, unsigned block_align, unsigned height_align, unsigned base_align, unsigned *l0_size, unsigned *mipmap_size) { @@ -1590,7 +1591,7 @@ static void r600_texture_size(unsigned nfaces, unsigned blevel, unsigned llevel, depth = r600_mip_minify(d0, i); - size = nbx * nby * blocksize; + size = nbx * nby * blocksize * nsamples; if (nfaces) size *= nfaces; else @@ -1742,7 +1743,7 @@ static int r600_check_texture_resource(struct radeon_cs_parser *p, u32 idx, nfaces = larray - barray + 1; } - r600_texture_size(nfaces, blevel, llevel, w0, h0, d0, format, + r600_texture_size(nfaces, blevel, llevel, w0, h0, d0, array_check.nsamples, format, pitch_align, height_align, base_align, &l0_size, &mipmap_size); /* using get ib will give us the offset into the texture bo */