From patchwork Mon Oct 8 16:02:34 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Alex Deucher X-Patchwork-Id: 1566281 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id ADDADDF238 for ; Mon, 8 Oct 2012 16:02:56 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9B1419FD76 for ; Mon, 8 Oct 2012 09:02:56 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-qa0-f42.google.com (mail-qa0-f42.google.com [209.85.216.42]) by gabe.freedesktop.org (Postfix) with ESMTP id 2816D9EF05 for ; Mon, 8 Oct 2012 09:02:44 -0700 (PDT) Received: by mail-qa0-f42.google.com with SMTP id t11so2244921qaa.15 for ; Mon, 08 Oct 2012 09:02:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :mime-version:content-type:content-transfer-encoding; bh=1xKTdwZxFw0mupQb51mBRFz2AmitkLPoSyGq8RlBRVE=; b=nawuW7kbC4wnE81vmC24mxVx7zuvB0G6gMFUgkdZF3939p4PpbhARkv0eKIFT+3bkn z8vinJ8usocTdERAqDXImbfsg9BXU8/pYw4tvB0DrBz3grQvbc24GmJ/3qs64pd7H+5r MsfH3vW3Ght8KwBVsD7r8IOoryjQ4S/MI/g6a8AQ3VufxaryxHcqOMGi4eG/fTj+b3Lx 3mxPLHnYzVH2bEqFkc7ZVCgQ7viFKBbxd3WpRsJkcM5RhRM5OjuYsUqTofceCad/zBKG IJp3c9EjqhAMZCSkye1SmzAucUoUcWq7N6vmRjw3RIieh6r+hxUW9FnBUOT3+IaU6Wfi RbHw== Received: by 10.224.183.18 with SMTP id ce18mr30631827qab.90.1349712163397; Mon, 08 Oct 2012 09:02:43 -0700 (PDT) Received: from localhost.localdomain (static-74-96-105-49.washdc.fios.verizon.net. [74.96.105.49]) by mx.google.com with ESMTPS id gw9sm18434587qab.4.2012.10.08.09.02.42 (version=SSLv3 cipher=OTHER); Mon, 08 Oct 2012 09:02:42 -0700 (PDT) From: alexdeucher@gmail.com To: airlied@gmail.com, dri-devel@lists.freedesktop.org Subject: [PATCH 1/2] drm/radeon: update comments to clarify VM setup (v2) Date: Mon, 8 Oct 2012 12:02:34 -0400 Message-Id: <1349712154-2542-1-git-send-email-alexdeucher@gmail.com> X-Mailer: git-send-email 1.7.7.5 In-Reply-To: References: MIME-Version: 1.0 Cc: Alex Deucher X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: dri-devel-bounces+patchwork-dri-devel=patchwork.kernel.org@lists.freedesktop.org Errors-To: dri-devel-bounces+patchwork-dri-devel=patchwork.kernel.org@lists.freedesktop.org From: Alex Deucher The actual set up and assignment of VM page tables is done on the fly in radeon_gart.c. v2: update vm size comments Signed-off-by: Alex Deucher Reviewed-by: Christian König --- drivers/gpu/drm/radeon/ni.c | 4 ++++ drivers/gpu/drm/radeon/radeon_device.c | 4 ++++ drivers/gpu/drm/radeon/si.c | 7 ++++--- 3 files changed, 12 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c index 9a46f7d..6883e14 100644 --- a/drivers/gpu/drm/radeon/ni.c +++ b/drivers/gpu/drm/radeon/ni.c @@ -770,6 +770,10 @@ static int cayman_pcie_gart_enable(struct radeon_device *rdev) WREG32(0x15DC, 0); /* empty context1-7 */ + /* Assign the pt base to something valid for now; the pts used for + * the VMs are determined by the application and setup and assigned + * on the fly in the vm part of radeon_gart.c + */ for (i = 1; i < 8; i++) { WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR + (i << 2), 0); WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR + (i << 2), 0); diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c index 64a4264..bd13ca0 100644 --- a/drivers/gpu/drm/radeon/radeon_device.c +++ b/drivers/gpu/drm/radeon/radeon_device.c @@ -1018,6 +1018,10 @@ int radeon_device_init(struct radeon_device *rdev, return r; /* initialize vm here */ mutex_init(&rdev->vm_manager.lock); + /* Adjust VM size here. + * Currently set to 4GB ((1 << 20) 4k pages). + * Max GPUVM size for cayman and SI is 40 bits. + */ rdev->vm_manager.max_pfn = 1 << 20; INIT_LIST_HEAD(&rdev->vm_manager.lru_vm); diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c index c76825f..f272ead 100644 --- a/drivers/gpu/drm/radeon/si.c +++ b/drivers/gpu/drm/radeon/si.c @@ -2407,12 +2407,13 @@ static int si_pcie_gart_enable(struct radeon_device *rdev) WREG32(0x15DC, 0); /* empty context1-15 */ - /* FIXME start with 4G, once using 2 level pt switch to full - * vm size space - */ /* set vm size, must be a multiple of 4 */ WREG32(VM_CONTEXT1_PAGE_TABLE_START_ADDR, 0); WREG32(VM_CONTEXT1_PAGE_TABLE_END_ADDR, rdev->vm_manager.max_pfn); + /* Assign the pt base to something valid for now; the pts used for + * the VMs are determined by the application and setup and assigned + * on the fly in the vm part of radeon_gart.c + */ for (i = 1; i < 16; i++) { if (i < 8) WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR + (i << 2),