From patchwork Sun Dec 23 02:55:53 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Deucher X-Patchwork-Id: 1906741 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork1.kernel.org (Postfix) with ESMTP id 369493FCA5 for ; Sun, 23 Dec 2012 02:56:21 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id F1326E5EB6 for ; Sat, 22 Dec 2012 18:56:20 -0800 (PST) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-vb0-f46.google.com (mail-vb0-f46.google.com [209.85.212.46]) by gabe.freedesktop.org (Postfix) with ESMTP id 08EF9E5C3A for ; Sat, 22 Dec 2012 18:56:05 -0800 (PST) Received: by mail-vb0-f46.google.com with SMTP id b13so6525916vby.33 for ; Sat, 22 Dec 2012 18:56:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer; bh=M3QqMsfeckhJoj8a7dH6s4c2xouOXERXW+8Ie5BosDI=; b=bTX25JIxNtLPVVEhao+cDJO+Fzs2Qra+SF0P2zS5KeW+GhPXX4M67Grlz4v+jLthey 5oje2XFWEbB+ZixKDkJEmClfB7b5AtDp5HwlIxU6jUzxiu0xzRNA2k2HFxQPiEadlRc+ BbMcNe4u/6ttHwNg3DlQpm/Y6zKLTu3bjfiZ8PHTiSI19Y4a29sdZOgv+Y0o/8znvqqx VbabvieyaK01cEBeCNMtSH56Q1Rr3dTzD+kjDavv3bwc+Mdcd5sQo3XxLsxtU1tKNurd ZdiUZx1SC5pkUI6qFEqlCiLX9fpIS3aDnsxFGrSJt2x4S7TIyx93GCslswI3Wr0RN/AA Jr3A== X-Received: by 10.52.38.163 with SMTP id h3mr24153131vdk.35.1356231365457; Sat, 22 Dec 2012 18:56:05 -0800 (PST) Received: from localhost.localdomain (static-74-96-105-49.washdc.fios.verizon.net. [74.96.105.49]) by mx.google.com with ESMTPS id y7sm14191462vdt.14.2012.12.22.18.56.03 (version=SSLv3 cipher=OTHER); Sat, 22 Dec 2012 18:56:04 -0800 (PST) From: alexdeucher@gmail.com To: airlied@gmail.com, dri-devel@lists.freedesktop.org Subject: [PATCH 1/2] drm/radeon: fix VM flush sequence on cayman Date: Sat, 22 Dec 2012 21:55:53 -0500 Message-Id: <1356231354-9296-1-git-send-email-alexdeucher@gmail.com> X-Mailer: git-send-email 1.7.7.5 Cc: Alex Deucher X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: dri-devel-bounces+patchwork-dri-devel=patchwork.kernel.org@lists.freedesktop.org Errors-To: dri-devel-bounces+patchwork-dri-devel=patchwork.kernel.org@lists.freedesktop.org From: Alex Deucher CP changes: - make sure the new VM base address hits the registers - wait for the VM invalidate to finish DMA changes: - wait for the VM invalidate to finish May fix: https://bugs.freedesktop.org/show_bug.cgi?id=58354 https://bugs.freedesktop.org/show_bug.cgi?id=58667 possibly other related issues. Signed-off-by: Alex Deucher --- drivers/gpu/drm/radeon/ni.c | 32 ++++++++++++++++++++++++++++++-- drivers/gpu/drm/radeon/nid.h | 5 +++++ 2 files changed, 35 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c index 39e8be1..2b10ab6 100644 --- a/drivers/gpu/drm/radeon/ni.c +++ b/drivers/gpu/drm/radeon/ni.c @@ -1861,12 +1861,25 @@ void cayman_vm_set_page(struct radeon_device *rdev, uint64_t pe, void cayman_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm) { struct radeon_ring *ring = &rdev->ring[ridx]; + u32 vm_reg, vm_addr; if (vm == NULL) return; - radeon_ring_write(ring, PACKET0(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR + (vm->id << 2), 0)); - radeon_ring_write(ring, vm->pd_gpu_addr >> 12); + vm_reg = VM_CONTEXT0_PAGE_TABLE_BASE_ADDR + (vm->id << 2); + vm_addr = vm->pd_gpu_addr >> 12; + + radeon_ring_write(ring, PACKET0(vm_reg, 0)); + radeon_ring_write(ring, vm_addr); + + /* wait for the new value to hit the reg */ + radeon_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); + radeon_ring_write(ring, 3); /* == */ + radeon_ring_write(ring, vm_reg >> 2); + radeon_ring_write(ring, 0); + radeon_ring_write(ring, vm_addr); /* ref */ + radeon_ring_write(ring, 0xfffffff); /* mask */ + radeon_ring_write(ring, 0x10); /* flush hdp cache */ radeon_ring_write(ring, PACKET0(HDP_MEM_COHERENCY_FLUSH_CNTL, 0)); @@ -1876,6 +1889,15 @@ void cayman_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm) radeon_ring_write(ring, PACKET0(VM_INVALIDATE_REQUEST, 0)); radeon_ring_write(ring, 1 << vm->id); + /* wait for the request bit to clear */ + radeon_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); + radeon_ring_write(ring, 3); /* == */ + radeon_ring_write(ring, VM_INVALIDATE_REQUEST >> 2); + radeon_ring_write(ring, 0); + radeon_ring_write(ring, 0); /* ref */ + radeon_ring_write(ring, 1 << vm->id); /* mask */ + radeon_ring_write(ring, 0x10); + /* sync PFP to ME, otherwise we might get invalid PFP reads */ radeon_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0)); radeon_ring_write(ring, 0x0); @@ -1901,5 +1923,11 @@ void cayman_dma_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_SRBM_WRITE, 0, 0, 0)); radeon_ring_write(ring, (0xf << 16) | (VM_INVALIDATE_REQUEST >> 2)); radeon_ring_write(ring, 1 << vm->id); + + /* wait for the request bit to clear */ + radeon_ring_write(ring, DMA_SRBM_READ_PACKET(DMA_PACKET_SRBM_WRITE, 1, 0)); + radeon_ring_write(ring, (0xfff << 20) | (VM_INVALIDATE_REQUEST >> 2)); + radeon_ring_write(ring, 1 << vm->id); /* mask */ + radeon_ring_write(ring, 0); /* value */ } diff --git a/drivers/gpu/drm/radeon/nid.h b/drivers/gpu/drm/radeon/nid.h index b93186b..f2e73e7 100644 --- a/drivers/gpu/drm/radeon/nid.h +++ b/drivers/gpu/drm/radeon/nid.h @@ -663,6 +663,11 @@ (((vmid) & 0xF) << 20) | \ (((n) & 0xFFFFF) << 0)) +#define DMA_SRBM_READ_PACKET(cmd, p, n) ((((cmd) & 0xF) << 28) | \ + (1 << 27) | \ + (((p) & 0x1) << 26) | \ + (((n) & 0xFFFFF) << 0)) + /* async DMA Packet types */ #define DMA_PACKET_WRITE 0x2 #define DMA_PACKET_COPY 0x3