From patchwork Wed Feb 13 21:20:21 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrik Jakobsson X-Patchwork-Id: 2139491 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id A858EDFE75 for ; Wed, 13 Feb 2013 21:22:28 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8CED3E681B for ; Wed, 13 Feb 2013 13:22:28 -0800 (PST) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lb0-f176.google.com (mail-lb0-f176.google.com [209.85.217.176]) by gabe.freedesktop.org (Postfix) with ESMTP id CBF59E5EBB; Wed, 13 Feb 2013 13:22:14 -0800 (PST) Received: by mail-lb0-f176.google.com with SMTP id s4so1297870lbc.35 for ; Wed, 13 Feb 2013 13:22:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer; bh=qN/zKZ+dy3PX2WxncqIpBN7T76mOlj6lmM8eTGzXJsM=; b=iCgeQUQL0SDKvDmUXsyh849vR7kf9VYUpnZXT9b1FHyFHHP+imwsPulZWQsYDspR/W Sg+ZELDUJkPxjqM0+gqbzBux6yt3CLDav8iHYUOacRo3AMQxi514KoJVVRnjh8LxM/QZ FKI0x/NoEgCc1eV6HzyrKWJWskWe+zSFEHoo03UjVh/EN/wmstE34HSB0NKIy+an955u C/l9weLyQD0mf8DtCJVfDNYuTMjXyRnq5GZpQDGJ7eboZzZgwssbvjv37N/gtlPDSAFh 3Ngcu582or6LvY0yHXqXcZJ1IAdwKPIPJDh3jCFpfcDXOERLtsTMXPP6Uj1ktWbDb/j9 sqxw== X-Received: by 10.112.48.33 with SMTP id i1mr9080426lbn.76.1360790533546; Wed, 13 Feb 2013 13:22:13 -0800 (PST) Received: from patrik-macbook.lan (h138n8-oer-a32.ias.bredband.telia.com. [2.248.103.138]) by mx.google.com with ESMTPS id f4sm6380866lbo.4.2013.02.13.13.22.12 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 13 Feb 2013 13:22:12 -0800 (PST) From: Patrik Jakobsson To: dri-devel@lists.freedesktop.org Subject: [PATCH] drm/i915: Set i9xx lvds clock limits according to specifications Date: Wed, 13 Feb 2013 22:20:21 +0100 Message-Id: <1360790422-6935-1-git-send-email-patrik.r.jakobsson@gmail.com> X-Mailer: git-send-email 1.7.10.4 Cc: daniel.vetter@ffwll.ch, intel-gfx@lists.freedesktop.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: dri-devel-bounces+patchwork-dri-devel=patchwork.kernel.org@lists.freedesktop.org Errors-To: dri-devel-bounces+patchwork-dri-devel=patchwork.kernel.org@lists.freedesktop.org The Intel PRM says the M1 and M2 divisors must be in the range of 10-20 and 5-9. Since we do all calculations based on them being register values (which are subtracted by 2) we need to specify them accordingly. Signed-off-by: Patrik Jakobsson Reviewed-by: Chris Wilson --- drivers/gpu/drm/i915/intel_display.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 0dfecaf..4f6c594 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -168,8 +168,8 @@ static const intel_limit_t intel_limits_i9xx_lvds = { .vco = { .min = 1400000, .max = 2800000 }, .n = { .min = 1, .max = 6 }, .m = { .min = 70, .max = 120 }, - .m1 = { .min = 10, .max = 22 }, - .m2 = { .min = 5, .max = 9 }, + .m1 = { .min = 8, .max = 18 }, + .m2 = { .min = 3, .max = 7 }, .p = { .min = 7, .max = 98 }, .p1 = { .min = 1, .max = 8 }, .p2 = { .dot_limit = 112000,