| Message ID | 1361832922-19801-3-git-send-email-rodrigo.vivi@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Hi 2013/2/25 Rodrigo Vivi <rodrigo.vivi@gmail.com>: > While old platforms had 3 transcoders and 3 pipes (1:1), HSW has > 4 transcoders and 3 pipes. > These regs were being used only by HDMI code where pipe is always the same > thing as cpu_transcoder. > This patch allow us to use them for DP, specially for TRANSCODER_EDP. > > v2: Adding HSW_TVIDEO_DIP_VSC_DATA to transmit vsc to eDP. > > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> > --- > drivers/gpu/drm/i915/i915_reg.h | 18 ++++++++++-------- > drivers/gpu/drm/i915/intel_hdmi.c | 13 +++++++------ > 2 files changed, 17 insertions(+), 14 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index 527b664..b715ecd 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -3754,14 +3754,16 @@ > #define HSW_VIDEO_DIP_VSC_ECC_B 0x61344 > #define HSW_VIDEO_DIP_GCP_B 0x61210 > > -#define HSW_TVIDEO_DIP_CTL(pipe) \ > - _PIPE(pipe, HSW_VIDEO_DIP_CTL_A, HSW_VIDEO_DIP_CTL_B) > -#define HSW_TVIDEO_DIP_AVI_DATA(pipe) \ > - _PIPE(pipe, HSW_VIDEO_DIP_AVI_DATA_A, HSW_VIDEO_DIP_AVI_DATA_B) > -#define HSW_TVIDEO_DIP_SPD_DATA(pipe) \ > - _PIPE(pipe, HSW_VIDEO_DIP_SPD_DATA_A, HSW_VIDEO_DIP_SPD_DATA_B) > -#define HSW_TVIDEO_DIP_GCP(pipe) \ > - _PIPE(pipe, HSW_VIDEO_DIP_GCP_A, HSW_VIDEO_DIP_GCP_B) > +#define HSW_TVIDEO_DIP_CTL(trans) \ > + _TRANSCODER(trans, HSW_VIDEO_DIP_CTL_A, HSW_VIDEO_DIP_CTL_B) > +#define HSW_TVIDEO_DIP_AVI_DATA(trans) \ > + _TRANSCODER(trans, HSW_VIDEO_DIP_AVI_DATA_A, HSW_VIDEO_DIP_AVI_DATA_B) > +#define HSW_TVIDEO_DIP_SPD_DATA(trans) \ > + _TRANSCODER(trans, HSW_VIDEO_DIP_SPD_DATA_A, HSW_VIDEO_DIP_SPD_DATA_B) > +#define HSW_TVIDEO_DIP_GCP(trans) \ > + _TRANSCODER(trans, HSW_VIDEO_DIP_GCP_A, HSW_VIDEO_DIP_GCP_B) > +#define HSW_TVIDEO_DIP_VSC_DATA(trans) \ > + _TRANSCODER(trans, HSW_VIDEO_DIP_VSC_DATA_A, HSW_VIDEO_DIP_VSC_DATA_B) > > #define _TRANS_HTOTAL_B 0xe1000 > #define _TRANS_HBLANK_B 0xe1004 > diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c > index 5a6138c..26290c1 100644 > --- a/drivers/gpu/drm/i915/intel_hdmi.c > +++ b/drivers/gpu/drm/i915/intel_hdmi.c > @@ -120,13 +120,14 @@ static u32 hsw_infoframe_enable(struct dip_infoframe *frame) > } > } > > -static u32 hsw_infoframe_data_reg(struct dip_infoframe *frame, enum pipe pipe) > +static u32 hsw_infoframe_data_reg(struct dip_infoframe *frame, > + enum transcoder cpu_transcoder) > { > switch (frame->type) { > case DIP_TYPE_AVI: > - return HSW_TVIDEO_DIP_AVI_DATA(pipe); > + return HSW_TVIDEO_DIP_AVI_DATA(cpu_transcoder); > case DIP_TYPE_SPD: > - return HSW_TVIDEO_DIP_SPD_DATA(pipe); > + return HSW_TVIDEO_DIP_SPD_DATA(cpu_transcoder); > default: > DRM_DEBUG_DRIVER("unknown info frame type %d\n", frame->type); > return 0; > @@ -293,8 +294,8 @@ static void hsw_write_infoframe(struct drm_encoder *encoder, > struct drm_device *dev = encoder->dev; > struct drm_i915_private *dev_priv = dev->dev_private; > struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); > - u32 ctl_reg = HSW_TVIDEO_DIP_CTL(intel_crtc->pipe); > - u32 data_reg = hsw_infoframe_data_reg(frame, intel_crtc->pipe); > + u32 ctl_reg = HSW_TVIDEO_DIP_CTL(intel_crtc->cpu_transcoder); > + u32 data_reg = hsw_infoframe_data_reg(frame, intel_crtc->cpu_transcoder); > unsigned int i, len = DIP_HEADER_SIZE + frame->len; > u32 val = I915_READ(ctl_reg); > > @@ -568,7 +569,7 @@ static void hsw_set_infoframes(struct drm_encoder *encoder, > struct drm_i915_private *dev_priv = encoder->dev->dev_private; > struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); > struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder); > - u32 reg = HSW_TVIDEO_DIP_CTL(intel_crtc->pipe); > + u32 reg = HSW_TVIDEO_DIP_CTL(intel_crtc->cpu_transcoder); > u32 val = I915_READ(reg); > > assert_hdmi_port_disabled(intel_hdmi); > -- > 1.8.1.2 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
On Wed, Feb 27, 2013 at 04:44:59PM -0300, Paulo Zanoni wrote: > Hi > > 2013/2/25 Rodrigo Vivi <rodrigo.vivi@gmail.com>: > > While old platforms had 3 transcoders and 3 pipes (1:1), HSW has > > 4 transcoders and 3 pipes. > > These regs were being used only by HDMI code where pipe is always the same > > thing as cpu_transcoder. > > This patch allow us to use them for DP, specially for TRANSCODER_EDP. > > > > v2: Adding HSW_TVIDEO_DIP_VSC_DATA to transmit vsc to eDP. > > > > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> > > Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Queued for -next, thanks for the patch. -Daniel
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 527b664..b715ecd 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -3754,14 +3754,16 @@ #define HSW_VIDEO_DIP_VSC_ECC_B 0x61344 #define HSW_VIDEO_DIP_GCP_B 0x61210 -#define HSW_TVIDEO_DIP_CTL(pipe) \ - _PIPE(pipe, HSW_VIDEO_DIP_CTL_A, HSW_VIDEO_DIP_CTL_B) -#define HSW_TVIDEO_DIP_AVI_DATA(pipe) \ - _PIPE(pipe, HSW_VIDEO_DIP_AVI_DATA_A, HSW_VIDEO_DIP_AVI_DATA_B) -#define HSW_TVIDEO_DIP_SPD_DATA(pipe) \ - _PIPE(pipe, HSW_VIDEO_DIP_SPD_DATA_A, HSW_VIDEO_DIP_SPD_DATA_B) -#define HSW_TVIDEO_DIP_GCP(pipe) \ - _PIPE(pipe, HSW_VIDEO_DIP_GCP_A, HSW_VIDEO_DIP_GCP_B) +#define HSW_TVIDEO_DIP_CTL(trans) \ + _TRANSCODER(trans, HSW_VIDEO_DIP_CTL_A, HSW_VIDEO_DIP_CTL_B) +#define HSW_TVIDEO_DIP_AVI_DATA(trans) \ + _TRANSCODER(trans, HSW_VIDEO_DIP_AVI_DATA_A, HSW_VIDEO_DIP_AVI_DATA_B) +#define HSW_TVIDEO_DIP_SPD_DATA(trans) \ + _TRANSCODER(trans, HSW_VIDEO_DIP_SPD_DATA_A, HSW_VIDEO_DIP_SPD_DATA_B) +#define HSW_TVIDEO_DIP_GCP(trans) \ + _TRANSCODER(trans, HSW_VIDEO_DIP_GCP_A, HSW_VIDEO_DIP_GCP_B) +#define HSW_TVIDEO_DIP_VSC_DATA(trans) \ + _TRANSCODER(trans, HSW_VIDEO_DIP_VSC_DATA_A, HSW_VIDEO_DIP_VSC_DATA_B) #define _TRANS_HTOTAL_B 0xe1000 #define _TRANS_HBLANK_B 0xe1004 diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index 5a6138c..26290c1 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c @@ -120,13 +120,14 @@ static u32 hsw_infoframe_enable(struct dip_infoframe *frame) } } -static u32 hsw_infoframe_data_reg(struct dip_infoframe *frame, enum pipe pipe) +static u32 hsw_infoframe_data_reg(struct dip_infoframe *frame, + enum transcoder cpu_transcoder) { switch (frame->type) { case DIP_TYPE_AVI: - return HSW_TVIDEO_DIP_AVI_DATA(pipe); + return HSW_TVIDEO_DIP_AVI_DATA(cpu_transcoder); case DIP_TYPE_SPD: - return HSW_TVIDEO_DIP_SPD_DATA(pipe); + return HSW_TVIDEO_DIP_SPD_DATA(cpu_transcoder); default: DRM_DEBUG_DRIVER("unknown info frame type %d\n", frame->type); return 0; @@ -293,8 +294,8 @@ static void hsw_write_infoframe(struct drm_encoder *encoder, struct drm_device *dev = encoder->dev; struct drm_i915_private *dev_priv = dev->dev_private; struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); - u32 ctl_reg = HSW_TVIDEO_DIP_CTL(intel_crtc->pipe); - u32 data_reg = hsw_infoframe_data_reg(frame, intel_crtc->pipe); + u32 ctl_reg = HSW_TVIDEO_DIP_CTL(intel_crtc->cpu_transcoder); + u32 data_reg = hsw_infoframe_data_reg(frame, intel_crtc->cpu_transcoder); unsigned int i, len = DIP_HEADER_SIZE + frame->len; u32 val = I915_READ(ctl_reg); @@ -568,7 +569,7 @@ static void hsw_set_infoframes(struct drm_encoder *encoder, struct drm_i915_private *dev_priv = encoder->dev->dev_private; struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder); - u32 reg = HSW_TVIDEO_DIP_CTL(intel_crtc->pipe); + u32 reg = HSW_TVIDEO_DIP_CTL(intel_crtc->cpu_transcoder); u32 val = I915_READ(reg); assert_hdmi_port_disabled(intel_hdmi);
While old platforms had 3 transcoders and 3 pipes (1:1), HSW has 4 transcoders and 3 pipes. These regs were being used only by HDMI code where pipe is always the same thing as cpu_transcoder. This patch allow us to use them for DP, specially for TRANSCODER_EDP. v2: Adding HSW_TVIDEO_DIP_VSC_DATA to transmit vsc to eDP. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> --- drivers/gpu/drm/i915/i915_reg.h | 18 ++++++++++-------- drivers/gpu/drm/i915/intel_hdmi.c | 13 +++++++------ 2 files changed, 17 insertions(+), 14 deletions(-)