From patchwork Thu May 9 21:30:32 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?TWFyZWsgT2zFocOhaw==?= X-Patchwork-Id: 2545921 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork1.kernel.org (Postfix) with ESMTP id 816533FD4E for ; Thu, 9 May 2013 21:30:52 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 756EDE5D32 for ; Thu, 9 May 2013 14:30:52 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-ea0-f177.google.com (mail-ea0-f177.google.com [209.85.215.177]) by gabe.freedesktop.org (Postfix) with ESMTP id E0B06E5C97 for ; Thu, 9 May 2013 14:30:41 -0700 (PDT) Received: by mail-ea0-f177.google.com with SMTP id o10so1806421eaj.8 for ; Thu, 09 May 2013 14:30:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:from:to:subject:date:message-id:x-mailer; bh=lSFVSAGhpo0CWvXEo7IS4iLqDoUCi3Scvk2PEUl7Fgs=; b=U/RM5bdDOTtPmd5aBkOqsPQ5TWnY1mJd6engxdCM/wu9l2XmPjmu3u8L3azfSNGgeR RpQ2mu+LTRsgnW+yLFzPUOj0dCjkpSDCX4QZKcnhdxKB1tR5WTXRkZY6m9f/E+eJITyC n+Sg2TJVq7+AROL/omFUQWERnDyLJEugcJNznJj8Dijp9HOPDalCTKcCosrEM6nI7hIW PFrY1TPNHxZcIje6kPrGR+A9J6NxWXf36sIAa4OpzwxWwbkSIHCHL7NAjTU5rpKCGDfW 38c4QlT70YF5FIF2OApIySsAVsjX3lrSASfItcKP/JbPIlp7LvQvG/6dEZKESTOY237Y 3eFQ== X-Received: by 10.14.87.9 with SMTP id x9mr18484399eee.3.1368135040625; Thu, 09 May 2013 14:30:40 -0700 (PDT) Received: from localhost.localdomain ([194.228.11.219]) by mx.google.com with ESMTPSA id e2sm6575464eem.16.2013.05.09.14.30.39 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 09 May 2013 14:30:39 -0700 (PDT) From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= To: dri-devel@lists.freedesktop.org Subject: [PATCH] radeon: add RADEON_SURF_FMASK flag which disables 2D->1D tiling transition Date: Thu, 9 May 2013 23:30:32 +0200 Message-Id: <1368135032-6977-1-git-send-email-maraeo@gmail.com> X-Mailer: git-send-email 1.7.10.4 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: dri-devel-bounces+patchwork-dri-devel=patchwork.kernel.org@lists.freedesktop.org Errors-To: dri-devel-bounces+patchwork-dri-devel=patchwork.kernel.org@lists.freedesktop.org I will release a new version of libdrm after this is committed. Reviewed-by: Alex Deucher --- radeon/radeon_surface.c | 9 ++++++--- radeon/radeon_surface.h | 1 + 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/radeon/radeon_surface.c b/radeon/radeon_surface.c index 288b5e2..56012da 100644 --- a/radeon/radeon_surface.c +++ b/radeon/radeon_surface.c @@ -158,7 +158,8 @@ static void surf_minify(struct radeon_surface *surf, surflevel->nblk_x = (surflevel->npix_x + surf->blk_w - 1) / surf->blk_w; surflevel->nblk_y = (surflevel->npix_y + surf->blk_h - 1) / surf->blk_h; surflevel->nblk_z = (surflevel->npix_z + surf->blk_d - 1) / surf->blk_d; - if (surf->nsamples == 1 && surflevel->mode == RADEON_SURF_MODE_2D) { + if (surf->nsamples == 1 && surflevel->mode == RADEON_SURF_MODE_2D && + !(surf->flags & RADEON_SURF_FMASK)) { if (surflevel->nblk_x < xalign || surflevel->nblk_y < yalign) { surflevel->mode = RADEON_SURF_MODE_1D; return; @@ -564,7 +565,8 @@ static void eg_surf_minify(struct radeon_surface *surf, surflevel->nblk_x = (surflevel->npix_x + surf->blk_w - 1) / surf->blk_w; surflevel->nblk_y = (surflevel->npix_y + surf->blk_h - 1) / surf->blk_h; surflevel->nblk_z = (surflevel->npix_z + surf->blk_d - 1) / surf->blk_d; - if (surf->nsamples == 1 && surflevel->mode == RADEON_SURF_MODE_2D) { + if (surf->nsamples == 1 && surflevel->mode == RADEON_SURF_MODE_2D && + !(surf->flags & RADEON_SURF_FMASK)) { if (surflevel->nblk_x < mtilew || surflevel->nblk_y < mtileh) { surflevel->mode = RADEON_SURF_MODE_1D; return; @@ -1458,7 +1460,8 @@ static void si_surf_minify_2d(struct radeon_surface *surf, surflevel->nblk_z = (surflevel->npix_z + surf->blk_d - 1) / surf->blk_d; } - if (surf->nsamples == 1 && surflevel->mode == RADEON_SURF_MODE_2D) { + if (surf->nsamples == 1 && surflevel->mode == RADEON_SURF_MODE_2D && + !(surf->flags & RADEON_SURF_FMASK)) { if (surflevel->nblk_x < xalign || surflevel->nblk_y < yalign) { surflevel->mode = RADEON_SURF_MODE_1D; return; diff --git a/radeon/radeon_surface.h b/radeon/radeon_surface.h index 2babfd7..bbed56f 100644 --- a/radeon/radeon_surface.h +++ b/radeon/radeon_surface.h @@ -56,6 +56,7 @@ #define RADEON_SURF_SBUFFER (1 << 18) #define RADEON_SURF_HAS_SBUFFER_MIPTREE (1 << 19) #define RADEON_SURF_HAS_TILE_MODE_INDEX (1 << 20) +#define RADEON_SURF_FMASK (1 << 21) #define RADEON_SURF_GET(v, field) (((v) >> RADEON_SURF_ ## field ## _SHIFT) & RADEON_SURF_ ## field ## _MASK) #define RADEON_SURF_SET(v, field) (((v) & RADEON_SURF_ ## field ## _MASK) << RADEON_SURF_ ## field ## _SHIFT)