From patchwork Mon Jun 10 11:01:00 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rahul Sharma X-Patchwork-Id: 2696971 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id 1ECD5DF264 for ; Mon, 10 Jun 2013 11:14:29 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 13DEEE62A3 for ; Mon, 10 Jun 2013 04:14:29 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mailout4.samsung.com (mailout4.samsung.com [203.254.224.34]) by gabe.freedesktop.org (Postfix) with ESMTP id B04FAE625B for ; Mon, 10 Jun 2013 03:41:11 -0700 (PDT) Received: from epcpsbgr3.samsung.com (u143.gpu120.samsung.co.kr [203.254.230.143]) by mailout4.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MO60067TAZZMRO0@mailout4.samsung.com> for dri-devel@lists.freedesktop.org; Mon, 10 Jun 2013 19:41:10 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [172.20.52.124]) by epcpsbgr3.samsung.com (EPCPMTA) with SMTP id F5.BE.03969.64DA5B15; Mon, 10 Jun 2013 19:41:10 +0900 (KST) X-AuditID: cbfee68f-b7f436d000000f81-ed-51b5ad46a0ba Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 14.DF.21068.64DA5B15; Mon, 10 Jun 2013 19:41:10 +0900 (KST) Received: from chromeserver-PowerEdge-T410.sisodomain.com ([107.108.73.106]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MO6001FHATOFA30@mmp2.samsung.com>; Mon, 10 Jun 2013 19:41:10 +0900 (KST) From: Rahul Sharma To: linux-samsung-soc@vger.kernel.org, devicetree-discuss@lists.ozlabs.org Subject: [PATCH 3/5] clk/exynos5250: add sclk_hdmiphy in the list of special clocks Date: Mon, 10 Jun 2013 16:31:00 +0530 Message-id: <1370862062-16680-4-git-send-email-rahul.sharma@samsung.com> X-Mailer: git-send-email 1.7.10.4 In-reply-to: <1370862062-16680-1-git-send-email-rahul.sharma@samsung.com> References: <1370862062-16680-1-git-send-email-rahul.sharma@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFmpjkeLIzCtJLcpLzFFi42JZI2JSo+u2dmugwfFOMYuPp26zWhyY/ZDV 4srX92wWk+5PYLH4vusLu0XvgqtsFjPO72OyWPgi3mLKosOsFjMmv2Rz4PLYOesuu8f97uNM HudnLGT06NuyitHj8ya5ANYoLpuU1JzMstQifbsErozn596zFlzmr1h8v4e9gXE+bxcjJ4eE gInE0pN3WSFsMYkL99azdTFycQgJLGWU+Lr0GCtM0d6XUxkhEtMZJa5eX8EK4cxmkph74AET SBWbgK7E7IPPGEFsEQEvie4129lBipgFrjBKXDt8C6xIWCBUouHacrAiFgFViQtre9lAbF4B D4nD318xQqxTlOh+NgEszingKXFi1iGwuBBQzZ+9e5lBhkoIbGKX2P5vHTPEIAGJb5MPsXQx cgAlZCU2HWCGmCMpcXDFDZYJjMILGBlWMYqmFiQXFCelFxnrFSfmFpfmpesl5+duYgTGwel/ z/p3MN49YH2IMRlo3ERmKdHkfGAc5ZXEGxqbGVmYmpgaG5lbmpEmrCTOq9ZiHSgkkJ5Ykpqd mlqQWhRfVJqTWnyIkYmDU6qB0TO2rq46hP20hs+vVftYts4M0poaZ1S84l+3f94Ot+1ifI+W WbZHpp8v9F3gdjNndeXTqpN+rOxK/H4mJ0PqNNIzLzZ1xLy0bPAutxDxm6UrWrb8zkOFWJ5D d/jeHzrO4Fl/7MrPCjEu13NKr3UfH53tHab3J2tfYry1f03fibXh17aun1yrxFKckWioxVxU nAgAQbA4z5kCAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrMIsWRmVeSWpSXmKPExsVy+t9jQV23tVsDDeZM4rX4eOo2q8WB2Q9Z La58fc9mMen+BBaL77u+sFv0LrjKZjHj/D4mi4Uv4i2mLDrMajFj8ks2By6PnbPusnvc7z7O 5HF+xkJGj74tqxg9Pm+SC2CNamC0yUhNTEktUkjNS85PycxLt1XyDo53jjc1MzDUNbS0MFdS yEvMTbVVcvEJ0HXLzAG6SkmhLDGnFCgUkFhcrKRvh2lCaIibrgVMY4Sub0gQXI+RARpIWMOY 8fzce9aCy/wVi+/3sDcwzuftYuTkkBAwkdj7ciojhC0mceHeerYuRi4OIYHpjBJXr69ghXBm M0nMPfCACaSKTUBXYvbBZ2AdIgJeEt1rtrODFDELXGGUuHb4FliRsECoRMO15WBFLAKqEhfW 9rKB2LwCHhKHv7+CWqco0f1sAlicU8BT4sSsQ2BxIaCaP3v3Mk9g5F3AyLCKUTS1ILmgOCk9 10ivODG3uDQvXS85P3cTIzjKnknvYFzVYHGIUYCDUYmH98GvLYFCrIllxZW5hxglOJiVRHiL Z20NFOJNSaysSi3Kjy8qzUktPsSYDHTVRGYp0eR8YALIK4k3NDYxNzU2tTSxMDGzJE1YSZz3 YKt1oJBAemJJanZqakFqEcwWJg5OqQZGpz+rt+d05pUIrY7k/zpR/tX+i1sOJEauUhWefd28 xvj8+TfbF/56EOg85ebUPR4MQU6s0s8EIhgurW3lst7oXa25VpJVY/LMGRU3HPnUr077+MW3 nK+RIUiTbffsA26cR1rYvn2VLj1WskRmSTEry3PRO179ZrpXmWdOqxWa07XvofhT8YJAJZbi jERDLeai4kQAESfq9PYCAAA= DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected X-Mailman-Approved-At: Mon, 10 Jun 2013 04:10:07 -0700 Cc: kgene.kim@samsung.com, sw0312.kim@samsung.com, joshi@samsung.com, dri-devel@lists.freedesktop.org, arun.kk@samsung.com, Rahul Sharma X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: dri-devel-bounces+patchwork-dri-devel=patchwork.kernel.org@lists.freedesktop.org Errors-To: dri-devel-bounces+patchwork-dri-devel=patchwork.kernel.org@lists.freedesktop.org hdmi driver needs hdmiphy clock which is one of the parent for hdmi mux clock. This is required while changing the parent of mux clock. Signed-off-by: Rahul Sharma --- Documentation/devicetree/bindings/clock/exynos5250-clock.txt | 1 + drivers/clk/samsung/clk-exynos5250.c | 3 ++- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/clock/exynos5250-clock.txt b/Documentation/devicetree/bindings/clock/exynos5250-clock.txt index b337147..f333d61 100644 --- a/Documentation/devicetree/bindings/clock/exynos5250-clock.txt +++ b/Documentation/devicetree/bindings/clock/exynos5250-clock.txt @@ -59,6 +59,7 @@ clock which they consume. sclk_spi0 154 sclk_spi1 155 sclk_spi2 156 + sclk_hdmiphy 157 [Peripheral Clock Gates] diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c index 587d913..88cdb13 100644 --- a/drivers/clk/samsung/clk-exynos5250.c +++ b/drivers/clk/samsung/clk-exynos5250.c @@ -87,6 +87,7 @@ enum exynos5250_clks { sclk_mmc0, sclk_mmc1, sclk_mmc2, sclk_mmc3, sclk_sata, sclk_usb3, sclk_jpeg, sclk_uart0, sclk_uart1, sclk_uart2, sclk_uart3, sclk_pwm, sclk_audio1, sclk_audio2, sclk_spdif, sclk_spi0, sclk_spi1, sclk_spi2, + sclk_hdmiphy, /* gate clocks */ gscl0 = 256, gscl1, gscl2, gscl3, gscl_wa, gscl_wb, smmu_gscl0, @@ -199,7 +200,7 @@ struct samsung_fixed_rate_clock exynos5250_fixed_rate_ext_clks[] __initdata = { /* fixed rate clocks generated inside the soc */ struct samsung_fixed_rate_clock exynos5250_fixed_rate_clks[] __initdata = { - FRATE(none, "sclk_hdmiphy", NULL, CLK_IS_ROOT, 24000000), + FRATE(sclk_hdmiphy, "sclk_hdmiphy", NULL, CLK_IS_ROOT, 24000000), FRATE(none, "sclk_hdmi27m", NULL, CLK_IS_ROOT, 27000000), FRATE(none, "sclk_dptxphy", NULL, CLK_IS_ROOT, 24000000), FRATE(none, "sclk_uhostphy", NULL, CLK_IS_ROOT, 48000000),