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[74.96.105.49]) by mx.google.com with ESMTPSA id r10sm32665096qeu.4.2013.06.26.06.25.26 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Wed, 26 Jun 2013 06:25:26 -0700 (PDT) From: alexdeucher@gmail.com To: dri-devel@lists.freedesktop.org Subject: [PATCH 105/165] drm/radeon/dpm: add pre/post_set_power_state callback (sumo) Date: Wed, 26 Jun 2013 09:23:05 -0400 Message-Id: <1372253045-17042-106-git-send-email-alexdeucher@gmail.com> X-Mailer: git-send-email 1.7.7.5 In-Reply-To: <1372253045-17042-1-git-send-email-alexdeucher@gmail.com> References: <1372253045-17042-1-git-send-email-alexdeucher@gmail.com> Cc: Alex Deucher X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: dri-devel-bounces+patchwork-dri-devel=patchwork.kernel.org@lists.freedesktop.org Errors-To: dri-devel-bounces+patchwork-dri-devel=patchwork.kernel.org@lists.freedesktop.org X-Spam-Status: No, score=-5.4 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Alex Deucher This properly implemented dynamic state adjustment by using a working copy of the requested and current power states. Signed-off-by: Alex Deucher --- drivers/gpu/drm/radeon/radeon_asic.c | 2 + drivers/gpu/drm/radeon/radeon_asic.h | 2 + drivers/gpu/drm/radeon/sumo_dpm.c | 74 ++++++++++++++++++++++++--------- drivers/gpu/drm/radeon/sumo_dpm.h | 6 ++- 4 files changed, 62 insertions(+), 22 deletions(-) diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c index 5014bd1..c5d70da 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.c +++ b/drivers/gpu/drm/radeon/radeon_asic.c @@ -1552,7 +1552,9 @@ static struct radeon_asic sumo_asic = { .setup_asic = &sumo_dpm_setup_asic, .enable = &sumo_dpm_enable, .disable = &sumo_dpm_disable, + .pre_set_power_state = &sumo_dpm_pre_set_power_state, .set_power_state = &sumo_dpm_set_power_state, + .post_set_power_state = &sumo_dpm_post_set_power_state, .display_configuration_changed = &sumo_dpm_display_configuration_changed, .fini = &sumo_dpm_fini, .get_sclk = &sumo_dpm_get_sclk, diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h index d7d4662..817fc26 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.h +++ b/drivers/gpu/drm/radeon/radeon_asic.h @@ -541,7 +541,9 @@ void btc_dpm_fini(struct radeon_device *rdev); int sumo_dpm_init(struct radeon_device *rdev); int sumo_dpm_enable(struct radeon_device *rdev); void sumo_dpm_disable(struct radeon_device *rdev); +int sumo_dpm_pre_set_power_state(struct radeon_device *rdev); int sumo_dpm_set_power_state(struct radeon_device *rdev); +void sumo_dpm_post_set_power_state(struct radeon_device *rdev); void sumo_dpm_setup_asic(struct radeon_device *rdev); void sumo_dpm_display_configuration_changed(struct radeon_device *rdev); void sumo_dpm_fini(struct radeon_device *rdev); diff --git a/drivers/gpu/drm/radeon/sumo_dpm.c b/drivers/gpu/drm/radeon/sumo_dpm.c index f5de850..10700e1 100644 --- a/drivers/gpu/drm/radeon/sumo_dpm.c +++ b/drivers/gpu/drm/radeon/sumo_dpm.c @@ -727,15 +727,6 @@ static void sumo_enable_boost(struct radeon_device *rdev, sumo_boost_state_enable(rdev, false); } -static void sumo_update_current_power_levels(struct radeon_device *rdev, - struct radeon_ps *rps) -{ - struct sumo_ps *new_ps = sumo_get_ps(rps); - struct sumo_power_info *pi = sumo_get_pi(rdev); - - pi->current_ps = *new_ps; -} - static void sumo_set_forced_level(struct radeon_device *rdev, u32 index) { WREG32_P(CG_SCLK_DPM_CTRL_3, FORCE_SCLK_STATE(index), ~FORCE_SCLK_STATE_MASK); @@ -1089,11 +1080,6 @@ static void sumo_apply_state_adjust_rules(struct radeon_device *rdev, u32 sclk_in_sr = pi->sys_info.min_sclk; /* ??? */ u32 i; - /* point to the hw copy since this function will modify the ps */ - pi->hw_ps = *ps; - rdev->pm.dpm.hw_ps.ps_priv = &pi->hw_ps; - ps = &pi->hw_ps; - if (new_rps->class & ATOM_PPLIB_CLASSIFICATION_THERMAL) return sumo_patch_thermal_state(rdev, ps, current_ps); @@ -1192,6 +1178,28 @@ static int sumo_set_thermal_temperature_range(struct radeon_device *rdev, return 0; } +static void sumo_update_current_ps(struct radeon_device *rdev, + struct radeon_ps *rps) +{ + struct sumo_ps *new_ps = sumo_get_ps(rps); + struct sumo_power_info *pi = sumo_get_pi(rdev); + + pi->current_rps = *rps; + pi->current_ps = *new_ps; + pi->current_rps.ps_priv = &pi->current_ps; +} + +static void sumo_update_requested_ps(struct radeon_device *rdev, + struct radeon_ps *rps) +{ + struct sumo_ps *new_ps = sumo_get_ps(rps); + struct sumo_power_info *pi = sumo_get_pi(rdev); + + pi->requested_rps = *rps; + pi->requested_ps = *new_ps; + pi->requested_rps.ps_priv = &pi->requested_ps; +} + int sumo_dpm_enable(struct radeon_device *rdev) { struct sumo_power_info *pi = sumo_get_pi(rdev); @@ -1230,6 +1238,8 @@ int sumo_dpm_enable(struct radeon_device *rdev) radeon_irq_set(rdev); } + sumo_update_current_ps(rdev, rdev->pm.dpm.boot_ps); + return 0; } @@ -1252,19 +1262,34 @@ void sumo_dpm_disable(struct radeon_device *rdev) rdev->irq.dpm_thermal = false; radeon_irq_set(rdev); } + + sumo_update_current_ps(rdev, rdev->pm.dpm.boot_ps); } -int sumo_dpm_set_power_state(struct radeon_device *rdev) +int sumo_dpm_pre_set_power_state(struct radeon_device *rdev) { struct sumo_power_info *pi = sumo_get_pi(rdev); - struct radeon_ps *new_ps = rdev->pm.dpm.requested_ps; - struct radeon_ps *old_ps = rdev->pm.dpm.current_ps; + struct radeon_ps requested_ps = *rdev->pm.dpm.requested_ps; + struct radeon_ps *new_ps = &requested_ps; + + sumo_update_requested_ps(rdev, new_ps); if (pi->enable_dynamic_patch_ps) - sumo_apply_state_adjust_rules(rdev, new_ps, old_ps); + sumo_apply_state_adjust_rules(rdev, + &pi->requested_rps, + &pi->current_rps); + + return 0; +} + +int sumo_dpm_set_power_state(struct radeon_device *rdev) +{ + struct sumo_power_info *pi = sumo_get_pi(rdev); + struct radeon_ps *new_ps = &pi->requested_rps; + struct radeon_ps *old_ps = &pi->current_rps; + if (pi->enable_dpm) sumo_set_uvd_clock_before_set_eng_clock(rdev, new_ps, old_ps); - sumo_update_current_power_levels(rdev, new_ps); if (pi->enable_boost) { sumo_enable_boost(rdev, new_ps, false); sumo_patch_boost_state(rdev, new_ps); @@ -1293,6 +1318,14 @@ int sumo_dpm_set_power_state(struct radeon_device *rdev) return 0; } +void sumo_dpm_post_set_power_state(struct radeon_device *rdev) +{ + struct sumo_power_info *pi = sumo_get_pi(rdev); + struct radeon_ps *new_ps = &pi->requested_rps; + + sumo_update_current_ps(rdev, new_ps); +} + void sumo_dpm_reset_asic(struct radeon_device *rdev) { sumo_program_bootup_state(rdev); @@ -1751,7 +1784,8 @@ void sumo_dpm_fini(struct radeon_device *rdev) u32 sumo_dpm_get_sclk(struct radeon_device *rdev, bool low) { - struct sumo_ps *requested_state = sumo_get_ps(rdev->pm.dpm.requested_ps); + struct sumo_power_info *pi = sumo_get_pi(rdev); + struct sumo_ps *requested_state = sumo_get_ps(&pi->requested_rps); if (low) return requested_state->levels[0].sclk; diff --git a/drivers/gpu/drm/radeon/sumo_dpm.h b/drivers/gpu/drm/radeon/sumo_dpm.h index a40b62a..a3a7a61 100644 --- a/drivers/gpu/drm/radeon/sumo_dpm.h +++ b/drivers/gpu/drm/radeon/sumo_dpm.h @@ -116,7 +116,6 @@ struct sumo_power_info { struct sumo_pl acpi_pl; struct sumo_pl boot_pl; struct sumo_pl boost_pl; - struct sumo_ps current_ps; bool disable_gfx_power_gating_in_uvd; bool driver_nbps_policy_disable; bool enable_alt_vddnb; @@ -129,7 +128,10 @@ struct sumo_power_info { bool enable_dynamic_patch_ps; bool enable_dpm; bool enable_boost; - struct sumo_ps hw_ps; + struct radeon_ps current_rps; + struct sumo_ps current_ps; + struct radeon_ps requested_rps; + struct sumo_ps requested_ps; }; #define SUMO_UTC_DFLT_00 0x48