From patchwork Wed Jun 26 13:22:00 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Deucher X-Patchwork-Id: 2785011 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 227DD9F245 for ; Wed, 26 Jun 2013 14:09:45 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 5790720519 for ; Wed, 26 Jun 2013 14:09:40 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 1C00C20516 for ; Wed, 26 Jun 2013 14:09:39 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 02254E6365 for ; Wed, 26 Jun 2013 07:09:39 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-qc0-f178.google.com (mail-qc0-f178.google.com [209.85.216.178]) by gabe.freedesktop.org (Postfix) with ESMTP id B47E8E6365 for ; Wed, 26 Jun 2013 06:24:40 -0700 (PDT) Received: by mail-qc0-f178.google.com with SMTP id c11so8017315qcv.23 for ; Wed, 26 Jun 2013 06:24:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=NxbYVf2UWZHwH2l4zgvVEMG+BciAPNMO9TkHaCDw1f4=; b=SAoZxspEKsqrgpf9fn9z6T0fGOwKVj0zj5/IP+poF0yEfUOIIQfviP8jLgqElitS6f zLE2+IZMlqCy6McVCX32HdPqD7va4doTpAbeU5wmfIhPE3Ebz0vydvf/r5ChBnzIn/sW AxYwaMPe6ClHTTT+FdZszezQeohoZl3JMSvzapt/Gqrlg2S4G/DBHRPlwoAq6dr/+Sch Z0fMpWnslv3dCQ9vQ3JF8sjx7OxYZoL+QefODjmMZ01XY8dvZCCcrnx/dS9qQ/kkUi2C lyjcMbQuUdol/+cqb7u7VrLiFwVkFvoXqmBT2EK2m58vwXDseBWLu2wdKaMaJ/Ivd+O9 30Nw== X-Received: by 10.224.36.143 with SMTP id t15mr5473611qad.60.1372253080260; Wed, 26 Jun 2013 06:24:40 -0700 (PDT) Received: from localhost.localdomain (static-74-96-105-49.washdc.fios.verizon.net. [74.96.105.49]) by mx.google.com with ESMTPSA id r10sm32665096qeu.4.2013.06.26.06.24.39 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Wed, 26 Jun 2013 06:24:39 -0700 (PDT) From: alexdeucher@gmail.com To: dri-devel@lists.freedesktop.org Subject: [PATCH 040/165] drm/radeon: Update radeon_info_ioctl for CIK (v2) Date: Wed, 26 Jun 2013 09:22:00 -0400 Message-Id: <1372253045-17042-41-git-send-email-alexdeucher@gmail.com> X-Mailer: git-send-email 1.7.7.5 In-Reply-To: <1372253045-17042-1-git-send-email-alexdeucher@gmail.com> References: <1372253045-17042-1-git-send-email-alexdeucher@gmail.com> Cc: Alex Deucher X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: dri-devel-bounces+patchwork-dri-devel=patchwork.kernel.org@lists.freedesktop.org Errors-To: dri-devel-bounces+patchwork-dri-devel=patchwork.kernel.org@lists.freedesktop.org X-Spam-Status: No, score=-5.4 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Alex Deucher v2: rebase changes, fix a couple missed cases Signed-off-by: Alex Deucher --- drivers/gpu/drm/radeon/radeon_kms.c | 33 ++++++++++++++++++++++++++------- 1 files changed, 26 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c index 4f2d4f4..c650228 100644 --- a/drivers/gpu/drm/radeon/radeon_kms.c +++ b/drivers/gpu/drm/radeon/radeon_kms.c @@ -229,7 +229,9 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) *value = rdev->accel_working; break; case RADEON_INFO_TILING_CONFIG: - if (rdev->family >= CHIP_TAHITI) + if (rdev->family >= CHIP_BONAIRE) + *value = rdev->config.cik.tile_config; + else if (rdev->family >= CHIP_TAHITI) *value = rdev->config.si.tile_config; else if (rdev->family >= CHIP_CAYMAN) *value = rdev->config.cayman.tile_config; @@ -281,7 +283,10 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) *value = rdev->clock.spll.reference_freq * 10; break; case RADEON_INFO_NUM_BACKENDS: - if (rdev->family >= CHIP_TAHITI) + if (rdev->family >= CHIP_BONAIRE) + *value = rdev->config.cik.max_backends_per_se * + rdev->config.cik.max_shader_engines; + else if (rdev->family >= CHIP_TAHITI) *value = rdev->config.si.max_backends_per_se * rdev->config.si.max_shader_engines; else if (rdev->family >= CHIP_CAYMAN) @@ -298,7 +303,9 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) } break; case RADEON_INFO_NUM_TILE_PIPES: - if (rdev->family >= CHIP_TAHITI) + if (rdev->family >= CHIP_BONAIRE) + *value = rdev->config.cik.max_tile_pipes; + else if (rdev->family >= CHIP_TAHITI) *value = rdev->config.si.max_tile_pipes; else if (rdev->family >= CHIP_CAYMAN) *value = rdev->config.cayman.max_tile_pipes; @@ -316,7 +323,9 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) *value = 1; break; case RADEON_INFO_BACKEND_MAP: - if (rdev->family >= CHIP_TAHITI) + if (rdev->family >= CHIP_BONAIRE) + return -EINVAL; + else if (rdev->family >= CHIP_TAHITI) *value = rdev->config.si.backend_map; else if (rdev->family >= CHIP_CAYMAN) *value = rdev->config.cayman.backend_map; @@ -343,7 +352,9 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) *value = RADEON_IB_VM_MAX_SIZE; break; case RADEON_INFO_MAX_PIPES: - if (rdev->family >= CHIP_TAHITI) + if (rdev->family >= CHIP_BONAIRE) + *value = rdev->config.cik.max_cu_per_sh; + else if (rdev->family >= CHIP_TAHITI) *value = rdev->config.si.max_cu_per_sh; else if (rdev->family >= CHIP_CAYMAN) *value = rdev->config.cayman.max_pipes_per_simd; @@ -367,7 +378,9 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) value64 = radeon_get_gpu_clock_counter(rdev); break; case RADEON_INFO_MAX_SE: - if (rdev->family >= CHIP_TAHITI) + if (rdev->family >= CHIP_BONAIRE) + *value = rdev->config.cik.max_shader_engines; + else if (rdev->family >= CHIP_TAHITI) *value = rdev->config.si.max_shader_engines; else if (rdev->family >= CHIP_CAYMAN) *value = rdev->config.cayman.max_shader_engines; @@ -377,7 +390,9 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) *value = 1; break; case RADEON_INFO_MAX_SH_PER_SE: - if (rdev->family >= CHIP_TAHITI) + if (rdev->family >= CHIP_BONAIRE) + *value = rdev->config.cik.max_sh_per_se; + else if (rdev->family >= CHIP_TAHITI) *value = rdev->config.si.max_sh_per_se; else return -EINVAL; @@ -407,6 +422,10 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) } break; case RADEON_INFO_SI_TILE_MODE_ARRAY: + if (rdev->family >= CHIP_BONAIRE) { + DRM_DEBUG_KMS("tile mode array is not implemented yet\n"); + return -EINVAL; + } if (rdev->family < CHIP_TAHITI) { DRM_DEBUG_KMS("tile mode array is si only!\n"); return -EINVAL;