@@ -1294,6 +1294,7 @@ struct radeon_dpm {
struct radeon_ps *boot_ps;
/* default uvd power state */
struct radeon_ps *uvd_ps;
+ struct radeon_ps hw_ps;
enum radeon_pm_state_type state;
enum radeon_pm_state_type user_state;
u32 platform_caps;
@@ -687,6 +687,17 @@ restart_search:
return NULL;
}
+static void radeon_dpm_update_requested_ps(struct radeon_device *rdev,
+ struct radeon_ps *ps)
+{
+ /* copy the ps to the hw ps and point the requested ps
+ * at the hw state in case the driver wants to modify
+ * the state dynamically.
+ */
+ rdev->pm.dpm.hw_ps = *ps;
+ rdev->pm.dpm.requested_ps = &rdev->pm.dpm.hw_ps;
+}
+
static void radeon_dpm_change_power_state_locked(struct radeon_device *rdev)
{
int i;
@@ -707,7 +718,7 @@ static void radeon_dpm_change_power_state_locked(struct radeon_device *rdev)
ps = radeon_dpm_pick_power_state(rdev, dpm_state);
if (ps)
- rdev->pm.dpm.requested_ps = ps;
+ radeon_dpm_update_requested_ps(rdev, ps);
else
return;
@@ -1072,6 +1072,11 @@ static void sumo_apply_state_adjust_rules(struct radeon_device *rdev)
u32 sclk_in_sr = pi->sys_info.min_sclk; /* ??? */
u32 i;
+ /* point to the hw copy since this function will modify the ps */
+ pi->hw_ps = *ps;
+ rdev->pm.dpm.hw_ps.ps_priv = &pi->hw_ps;
+ ps = &pi->hw_ps;
+
if (rps->class & ATOM_PPLIB_CLASSIFICATION_THERMAL)
return sumo_patch_thermal_state(rdev, ps, current_ps);
@@ -129,6 +129,7 @@ struct sumo_power_info {
bool enable_dynamic_patch_ps;
bool enable_dpm;
bool enable_boost;
+ struct sumo_ps hw_ps;
};
#define SUMO_UTC_DFLT_00 0x48