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[74.96.105.49]) by mx.google.com with ESMTPSA id r10sm32665096qeu.4.2013.06.26.06.25.20 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Wed, 26 Jun 2013 06:25:21 -0700 (PDT) From: alexdeucher@gmail.com To: dri-devel@lists.freedesktop.org Subject: [PATCH 096/165] drm/radeon/dpm/rv6xx: restructure code Date: Wed, 26 Jun 2013 09:22:56 -0400 Message-Id: <1372253045-17042-97-git-send-email-alexdeucher@gmail.com> X-Mailer: git-send-email 1.7.7.5 In-Reply-To: <1372253045-17042-1-git-send-email-alexdeucher@gmail.com> References: <1372253045-17042-1-git-send-email-alexdeucher@gmail.com> Cc: Alex Deucher X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: dri-devel-bounces+patchwork-dri-devel=patchwork.kernel.org@lists.freedesktop.org Errors-To: dri-devel-bounces+patchwork-dri-devel=patchwork.kernel.org@lists.freedesktop.org X-Spam-Status: No, score=-5.4 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Alex Deucher Needed to properly handle dynamic state adjustment. Signed-off-by: Alex Deucher --- drivers/gpu/drm/radeon/rv6xx_dpm.c | 115 +++++++++++++++++++++-------------- 1 files changed, 69 insertions(+), 46 deletions(-) diff --git a/drivers/gpu/drm/radeon/rv6xx_dpm.c b/drivers/gpu/drm/radeon/rv6xx_dpm.c index fa4beb2..e8f07b1 100644 --- a/drivers/gpu/drm/radeon/rv6xx_dpm.c +++ b/drivers/gpu/drm/radeon/rv6xx_dpm.c @@ -961,9 +961,11 @@ static void rv6xx_program_voltage_gpio_pins(struct radeon_device *rdev) rv6xx_get_master_voltage_mask(rdev)); } -static void rv6xx_enable_static_voltage_control(struct radeon_device *rdev, bool enable) +static void rv6xx_enable_static_voltage_control(struct radeon_device *rdev, + struct radeon_ps *new_ps, + bool enable) { - struct rv6xx_ps *new_state = rv6xx_get_ps(rdev->pm.dpm.requested_ps); + struct rv6xx_ps *new_state = rv6xx_get_ps(new_ps); if (enable) radeon_atom_set_voltage(rdev, @@ -1039,9 +1041,10 @@ static void rv6xx_calculate_ap(struct radeon_device *rdev, } -static void rv6xx_calculate_stepping_parameters(struct radeon_device *rdev) +static void rv6xx_calculate_stepping_parameters(struct radeon_device *rdev, + struct radeon_ps *new_ps) { - struct rv6xx_ps *new_state = rv6xx_get_ps(rdev->pm.dpm.requested_ps); + struct rv6xx_ps *new_state = rv6xx_get_ps(new_ps); rv6xx_calculate_engine_speed_stepping_parameters(rdev, new_state); rv6xx_calculate_memory_clock_stepping_parameters(rdev, new_state); @@ -1191,10 +1194,12 @@ static void rv6xx_program_display_gap(struct radeon_device *rdev) WREG32(CG_DISPLAY_GAP_CNTL, tmp); } -static void rv6xx_set_sw_voltage_to_safe(struct radeon_device *rdev) +static void rv6xx_set_sw_voltage_to_safe(struct radeon_device *rdev, + struct radeon_ps *new_ps, + struct radeon_ps *old_ps) { - struct rv6xx_ps *new_state = rv6xx_get_ps(rdev->pm.dpm.requested_ps); - struct rv6xx_ps *old_state = rv6xx_get_ps(rdev->pm.dpm.current_ps); + struct rv6xx_ps *new_state = rv6xx_get_ps(new_ps); + struct rv6xx_ps *old_state = rv6xx_get_ps(old_ps); u16 safe_voltage; safe_voltage = (new_state->low.vddc >= old_state->low.vddc) ? @@ -1207,9 +1212,10 @@ static void rv6xx_set_sw_voltage_to_safe(struct radeon_device *rdev) ~SW_GPIO_INDEX_MASK); } -static void rv6xx_set_sw_voltage_to_low(struct radeon_device *rdev) +static void rv6xx_set_sw_voltage_to_low(struct radeon_device *rdev, + struct radeon_ps *old_ps) { - struct rv6xx_ps *old_state = rv6xx_get_ps(rdev->pm.dpm.current_ps); + struct rv6xx_ps *old_state = rv6xx_get_ps(old_ps); rv6xx_program_voltage_stepping_entry(rdev, R600_POWER_LEVEL_CTXSW, old_state->low.vddc); @@ -1218,10 +1224,12 @@ static void rv6xx_set_sw_voltage_to_low(struct radeon_device *rdev) ~SW_GPIO_INDEX_MASK); } -static void rv6xx_set_safe_backbias(struct radeon_device *rdev) +static void rv6xx_set_safe_backbias(struct radeon_device *rdev, + struct radeon_ps *new_ps, + struct radeon_ps *old_ps) { - struct rv6xx_ps *new_state = rv6xx_get_ps(rdev->pm.dpm.requested_ps); - struct rv6xx_ps *old_state = rv6xx_get_ps(rdev->pm.dpm.current_ps); + struct rv6xx_ps *new_state = rv6xx_get_ps(new_ps); + struct rv6xx_ps *old_state = rv6xx_get_ps(old_ps); if ((new_state->low.flags & ATOM_PPLIB_R600_FLAGS_BACKBIASENABLE) && (old_state->low.flags & ATOM_PPLIB_R600_FLAGS_BACKBIASENABLE)) @@ -1230,10 +1238,12 @@ static void rv6xx_set_safe_backbias(struct radeon_device *rdev) WREG32_P(GENERAL_PWRMGT, 0, ~BACKBIAS_VALUE); } -static void rv6xx_set_safe_pcie_gen2(struct radeon_device *rdev) +static void rv6xx_set_safe_pcie_gen2(struct radeon_device *rdev, + struct radeon_ps *new_ps, + struct radeon_ps *old_ps) { - struct rv6xx_ps *new_state = rv6xx_get_ps(rdev->pm.dpm.requested_ps); - struct rv6xx_ps *old_state = rv6xx_get_ps(rdev->pm.dpm.current_ps); + struct rv6xx_ps *new_state = rv6xx_get_ps(new_ps); + struct rv6xx_ps *old_state = rv6xx_get_ps(old_ps); if ((new_state->low.flags & ATOM_PPLIB_R600_FLAGS_PCIEGEN2) != (old_state->low.flags & ATOM_PPLIB_R600_FLAGS_PCIEGEN2)) @@ -1290,10 +1300,12 @@ static int rv6xx_step_sw_voltage(struct radeon_device *rdev, return 0; } -static int rv6xx_step_voltage_if_increasing(struct radeon_device *rdev) +static int rv6xx_step_voltage_if_increasing(struct radeon_device *rdev, + struct radeon_ps *new_ps, + struct radeon_ps *old_ps) { - struct rv6xx_ps *new_state = rv6xx_get_ps(rdev->pm.dpm.requested_ps); - struct rv6xx_ps *old_state = rv6xx_get_ps(rdev->pm.dpm.current_ps); + struct rv6xx_ps *new_state = rv6xx_get_ps(new_ps); + struct rv6xx_ps *old_state = rv6xx_get_ps(old_ps); if (new_state->low.vddc > old_state->low.vddc) return rv6xx_step_sw_voltage(rdev, @@ -1303,10 +1315,12 @@ static int rv6xx_step_voltage_if_increasing(struct radeon_device *rdev) return 0; } -static int rv6xx_step_voltage_if_decreasing(struct radeon_device *rdev) +static int rv6xx_step_voltage_if_decreasing(struct radeon_device *rdev, + struct radeon_ps *new_ps, + struct radeon_ps *old_ps) { - struct rv6xx_ps *new_state = rv6xx_get_ps(rdev->pm.dpm.requested_ps); - struct rv6xx_ps *old_state = rv6xx_get_ps(rdev->pm.dpm.current_ps); + struct rv6xx_ps *new_state = rv6xx_get_ps(new_ps); + struct rv6xx_ps *old_state = rv6xx_get_ps(old_ps); if (new_state->low.vddc < old_state->low.vddc) return rv6xx_step_sw_voltage(rdev, @@ -1399,10 +1413,12 @@ static void rv6xx_enable_thermal_protection(struct radeon_device *rdev, r600_enable_thermal_protection(rdev, enable); } -static void rv6xx_generate_transition_stepping(struct radeon_device *rdev) +static void rv6xx_generate_transition_stepping(struct radeon_device *rdev, + struct radeon_ps *new_ps, + struct radeon_ps *old_ps) { - struct rv6xx_ps *new_state = rv6xx_get_ps(rdev->pm.dpm.requested_ps); - struct rv6xx_ps *old_state = rv6xx_get_ps(rdev->pm.dpm.current_ps); + struct rv6xx_ps *new_state = rv6xx_get_ps(new_ps); + struct rv6xx_ps *old_state = rv6xx_get_ps(old_ps); struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); rv6xx_generate_steps(rdev, @@ -1411,9 +1427,10 @@ static void rv6xx_generate_transition_stepping(struct radeon_device *rdev) 0, &pi->hw.medium_sclk_index); } -static void rv6xx_generate_low_step(struct radeon_device *rdev) +static void rv6xx_generate_low_step(struct radeon_device *rdev, + struct radeon_ps *new_ps) { - struct rv6xx_ps *new_state = rv6xx_get_ps(rdev->pm.dpm.requested_ps); + struct rv6xx_ps *new_state = rv6xx_get_ps(new_ps); struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); pi->hw.low_sclk_index = 0; @@ -1430,9 +1447,10 @@ static void rv6xx_invalidate_intermediate_steps(struct radeon_device *rdev) pi->hw.medium_sclk_index); } -static void rv6xx_generate_stepping_table(struct radeon_device *rdev) +static void rv6xx_generate_stepping_table(struct radeon_device *rdev, + struct radeon_ps *new_ps) { - struct rv6xx_ps *new_state = rv6xx_get_ps(rdev->pm.dpm.requested_ps); + struct rv6xx_ps *new_state = rv6xx_get_ps(new_ps); struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); pi->hw.low_sclk_index = 0; @@ -1472,9 +1490,10 @@ static void rv6xx_reset_lvtm_data_sync(struct radeon_device *rdev) } static void rv6xx_enable_dynamic_pcie_gen2(struct radeon_device *rdev, + struct radeon_ps *new_ps, bool enable) { - struct rv6xx_ps *new_state = rv6xx_get_ps(rdev->pm.dpm.requested_ps); + struct rv6xx_ps *new_state = rv6xx_get_ps(new_ps); if (enable) { rv6xx_enable_bif_dynamic_pcie_gen2(rdev, true); @@ -1491,6 +1510,7 @@ static void rv6xx_enable_dynamic_pcie_gen2(struct radeon_device *rdev, int rv6xx_dpm_enable(struct radeon_device *rdev) { struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); + struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps; if (r600_dynamicpm_enabled(rdev)) return -EINVAL; @@ -1518,12 +1538,12 @@ int rv6xx_dpm_enable(struct radeon_device *rdev) rv6xx_program_power_level_enter_state(rdev); - rv6xx_calculate_stepping_parameters(rdev); + rv6xx_calculate_stepping_parameters(rdev, boot_ps); if (pi->voltage_control) rv6xx_program_voltage_gpio_pins(rdev); - rv6xx_generate_stepping_table(rdev); + rv6xx_generate_stepping_table(rdev, boot_ps); rv6xx_program_stepping_parameters_except_lowest_entry(rdev); rv6xx_program_stepping_parameters_lowest_entry(rdev); @@ -1550,10 +1570,10 @@ int rv6xx_dpm_enable(struct radeon_device *rdev) r600_start_dpm(rdev); if (pi->voltage_control) - rv6xx_enable_static_voltage_control(rdev, false); + rv6xx_enable_static_voltage_control(rdev, boot_ps, false); if (pi->dynamic_pcie_gen2) - rv6xx_enable_dynamic_pcie_gen2(rdev, true); + rv6xx_enable_dynamic_pcie_gen2(rdev, boot_ps, true); if (pi->gfx_clock_gating) r600_gfx_clockgating_enable(rdev, true); @@ -1564,6 +1584,7 @@ int rv6xx_dpm_enable(struct radeon_device *rdev) void rv6xx_dpm_disable(struct radeon_device *rdev) { struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); + struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps; if (!r600_dynamicpm_enabled(rdev)) return; @@ -1587,10 +1608,10 @@ void rv6xx_dpm_disable(struct radeon_device *rdev) rv6xx_enable_spread_spectrum(rdev, false); if (pi->voltage_control) - rv6xx_enable_static_voltage_control(rdev, true); + rv6xx_enable_static_voltage_control(rdev, boot_ps, true); if (pi->dynamic_pcie_gen2) - rv6xx_enable_dynamic_pcie_gen2(rdev, false); + rv6xx_enable_dynamic_pcie_gen2(rdev, boot_ps, false); if (rdev->irq.installed && r600_is_internal_thermal_sensor(rdev->pm.int_thermal_type)) { @@ -1607,6 +1628,8 @@ void rv6xx_dpm_disable(struct radeon_device *rdev) int rv6xx_dpm_set_power_state(struct radeon_device *rdev) { struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); + struct radeon_ps *new_ps = rdev->pm.dpm.requested_ps; + struct radeon_ps *old_ps = rdev->pm.dpm.current_ps; rv6xx_clear_vc(rdev); r600_power_level_enable(rdev, R600_POWER_LEVEL_LOW, true); @@ -1619,20 +1642,20 @@ int rv6xx_dpm_set_power_state(struct radeon_device *rdev) r600_power_level_enable(rdev, R600_POWER_LEVEL_HIGH, false); r600_power_level_enable(rdev, R600_POWER_LEVEL_MEDIUM, false); - rv6xx_generate_transition_stepping(rdev); + rv6xx_generate_transition_stepping(rdev, new_ps, old_ps); rv6xx_program_power_level_medium_for_transition(rdev); if (pi->voltage_control) { - rv6xx_set_sw_voltage_to_safe(rdev); + rv6xx_set_sw_voltage_to_safe(rdev, new_ps, old_ps); if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_STEPVDDC) - rv6xx_set_sw_voltage_to_low(rdev); + rv6xx_set_sw_voltage_to_low(rdev, old_ps); } if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_BACKBIAS) - rv6xx_set_safe_backbias(rdev); + rv6xx_set_safe_backbias(rdev, new_ps, old_ps); if (pi->dynamic_pcie_gen2) - rv6xx_set_safe_pcie_gen2(rdev); + rv6xx_set_safe_pcie_gen2(rdev, new_ps, old_ps); if (pi->voltage_control) rv6xx_enable_dynamic_voltage_control(rdev, false); @@ -1642,7 +1665,7 @@ int rv6xx_dpm_set_power_state(struct radeon_device *rdev) if (pi->voltage_control) { if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_STEPVDDC) - rv6xx_step_voltage_if_increasing(rdev); + rv6xx_step_voltage_if_increasing(rdev, new_ps, old_ps); msleep((rdev->pm.dpm.voltage_response_time + 999) / 1000); } @@ -1650,9 +1673,9 @@ int rv6xx_dpm_set_power_state(struct radeon_device *rdev) r600_power_level_enable(rdev, R600_POWER_LEVEL_LOW, false); r600_wait_for_power_level_unequal(rdev, R600_POWER_LEVEL_LOW); - rv6xx_generate_low_step(rdev); + rv6xx_generate_low_step(rdev, new_ps); rv6xx_invalidate_intermediate_steps(rdev); - rv6xx_calculate_stepping_parameters(rdev); + rv6xx_calculate_stepping_parameters(rdev, new_ps); rv6xx_program_stepping_parameters_lowest_entry(rdev); rv6xx_program_power_level_low_to_lowest_state(rdev); @@ -1662,7 +1685,7 @@ int rv6xx_dpm_set_power_state(struct radeon_device *rdev) if (pi->voltage_control) { if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_STEPVDDC) - rv6xx_step_voltage_if_decreasing(rdev); + rv6xx_step_voltage_if_decreasing(rdev, new_ps, old_ps); rv6xx_enable_dynamic_voltage_control(rdev, true); } @@ -1670,11 +1693,11 @@ int rv6xx_dpm_set_power_state(struct radeon_device *rdev) rv6xx_enable_dynamic_backbias_control(rdev, true); if (pi->dynamic_pcie_gen2) - rv6xx_enable_dynamic_pcie_gen2(rdev, true); + rv6xx_enable_dynamic_pcie_gen2(rdev, new_ps, true); rv6xx_reset_lvtm_data_sync(rdev); - rv6xx_generate_stepping_table(rdev); + rv6xx_generate_stepping_table(rdev, new_ps); rv6xx_program_stepping_parameters_except_lowest_entry(rdev); rv6xx_program_power_level_low(rdev); rv6xx_program_power_level_medium(rdev);