diff mbox

[5/5] drm/i915: Add async page flip support for SNB

Message ID 1374544202-15496-6-git-send-email-keithp@keithp.com
State New, archived
Headers show

Commit Message

Keith Packard July 23, 2013, 1:50 a.m. UTC
Just copies the IVB code

Signed-off-by: Keith Packard <keithp@keithp.com>
---
 drivers/gpu/drm/i915/intel_display.c | 39 ++++++++++++++++++++++++++++++++----
 1 file changed, 35 insertions(+), 4 deletions(-)
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 1bcc6b4..9d7919b 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -7463,20 +7463,51 @@  static int intel_gen6_queue_flip(struct drm_device *dev,
 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 	struct intel_ring_buffer *ring = &dev_priv->ring[RCS];
 	uint32_t pf, pipesrc;
+	uint32_t cmd;
+	uint32_t base;
 	int ret;
 
 	ret = intel_pin_and_fence_fb_obj(dev, obj, ring);
 	if (ret)
 		goto err;
 
+	cmd = MI_DISPLAY_FLIP | MI_DISPLAY_FLIP_PLANE(intel_crtc->plane);
+	base = i915_gem_obj_ggtt_offset(obj) + intel_crtc->dspaddr_offset;
+
+	if (flags & DRM_MODE_PAGE_FLIP_ASYNC) {
+
+		/* XXX check limitations for async flip here */
+
+		if (fb->pitches[0] != I915_READ(DSPSTRIDE(intel_crtc->plane))) {
+			WARN_ONCE(1, "mismatching stride in async plane flip (%d != %d)\n",
+				  fb->pitches[0], I915_READ(DSPSTRIDE(intel_crtc->plane)));
+			ret = -EINVAL;
+			goto err_unpin;
+		}
+
+		if (obj->tiling_mode != I915_TILING_X) {
+			WARN_ONCE(1, "async plane flip requires X tiling\n");
+			ret = -EINVAL;
+			goto err_unpin;
+		}
+
+		if ((I915_READ(DSPCNTR(intel_crtc->plane)) & DISPPLANE_TILED) == 0) {
+			WARN_ONCE(1, "display not currently tiled in async plane flip\n");
+			ret = -EINVAL;
+			goto err_unpin;
+		}
+		
+		cmd |= MI_DISPLAY_FLIP_ASYNC_INDICATOR;
+		base |= MI_DISPLAY_FLIP_TYPE_ASYNC;
+	}
+
 	ret = intel_ring_begin(ring, 4);
 	if (ret)
 		goto err_unpin;
 
-	intel_ring_emit(ring, MI_DISPLAY_FLIP |
-			MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
+	intel_ring_emit(ring, cmd);
 	intel_ring_emit(ring, fb->pitches[0] | obj->tiling_mode);
-	intel_ring_emit(ring, i915_gem_obj_ggtt_offset(obj) + intel_crtc->dspaddr_offset);
+	intel_ring_emit(ring, base);
 
 	/* Contrary to the suggestions in the documentation,
 	 * "Enable Panel Fitter" does not seem to be required when page
@@ -9738,7 +9769,7 @@  void intel_modeset_init(struct drm_device *dev)
 		dev->mode_config.max_height = 8192;
 	}
 
-	if (IS_GEN7(dev))
+	if (IS_GEN6(dev) || IS_GEN7(dev))
 		dev->mode_config.async_page_flip = true;
 
 	dev->mode_config.fb_base = dev_priv->gtt.mappable_base;