From patchwork Tue Jul 23 01:50:02 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Keith Packard X-Patchwork-Id: 2831694 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 3CD8E9F4D4 for ; Tue, 23 Jul 2013 02:28:26 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 5CAEE20217 for ; Tue, 23 Jul 2013 02:28:25 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 770A0201F4 for ; Tue, 23 Jul 2013 02:28:24 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 64854E5F31 for ; Mon, 22 Jul 2013 19:28:24 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from keithp.com (home.keithp.com [63.227.221.253]) by gabe.freedesktop.org (Postfix) with ESMTP id 37CD1E5DED for ; Mon, 22 Jul 2013 18:52:46 -0700 (PDT) Received: from localhost (localhost [127.0.0.1]) by keithp.com (Postfix) with ESMTP id 2FC191488003; Mon, 22 Jul 2013 18:50:17 -0700 (PDT) X-Virus-Scanned: Debian amavisd-new at keithp.com Received: from keithp.com ([127.0.0.1]) by localhost (keithp.com [127.0.0.1]) (amavisd-new, port 10024) with LMTP id mPyLhNF11xKF; Mon, 22 Jul 2013 18:50:13 -0700 (PDT) Received: by keithp.com (Postfix, from userid 1033) id 45CF9760202; Mon, 22 Jul 2013 18:50:09 -0700 (PDT) Received: from miki.keithp.com (localhost [127.0.0.1]) by keithp.com (Postfix) with ESMTP id 3E854760201; Mon, 22 Jul 2013 18:50:09 -0700 (PDT) Received: by miki.keithp.com (Postfix, from userid 1001) id 1B3A7104A; Mon, 22 Jul 2013 18:50:09 -0700 (PDT) From: Keith Packard To: linux-kernel@vger.kernel.org, Dave Airlie Subject: [PATCH 5/5] drm/i915: Add async page flip support for SNB Date: Mon, 22 Jul 2013 18:50:02 -0700 Message-Id: <1374544202-15496-6-git-send-email-keithp@keithp.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1374544202-15496-1-git-send-email-keithp@keithp.com> References: <1374544202-15496-1-git-send-email-keithp@keithp.com> Cc: dri-devel@lists.freedesktop.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: dri-devel-bounces+patchwork-dri-devel=patchwork.kernel.org@lists.freedesktop.org Errors-To: dri-devel-bounces+patchwork-dri-devel=patchwork.kernel.org@lists.freedesktop.org X-Spam-Status: No, score=-5.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Just copies the IVB code Signed-off-by: Keith Packard --- drivers/gpu/drm/i915/intel_display.c | 39 ++++++++++++++++++++++++++++++++---- 1 file changed, 35 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 1bcc6b4..9d7919b 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -7463,20 +7463,51 @@ static int intel_gen6_queue_flip(struct drm_device *dev, struct intel_crtc *intel_crtc = to_intel_crtc(crtc); struct intel_ring_buffer *ring = &dev_priv->ring[RCS]; uint32_t pf, pipesrc; + uint32_t cmd; + uint32_t base; int ret; ret = intel_pin_and_fence_fb_obj(dev, obj, ring); if (ret) goto err; + cmd = MI_DISPLAY_FLIP | MI_DISPLAY_FLIP_PLANE(intel_crtc->plane); + base = i915_gem_obj_ggtt_offset(obj) + intel_crtc->dspaddr_offset; + + if (flags & DRM_MODE_PAGE_FLIP_ASYNC) { + + /* XXX check limitations for async flip here */ + + if (fb->pitches[0] != I915_READ(DSPSTRIDE(intel_crtc->plane))) { + WARN_ONCE(1, "mismatching stride in async plane flip (%d != %d)\n", + fb->pitches[0], I915_READ(DSPSTRIDE(intel_crtc->plane))); + ret = -EINVAL; + goto err_unpin; + } + + if (obj->tiling_mode != I915_TILING_X) { + WARN_ONCE(1, "async plane flip requires X tiling\n"); + ret = -EINVAL; + goto err_unpin; + } + + if ((I915_READ(DSPCNTR(intel_crtc->plane)) & DISPPLANE_TILED) == 0) { + WARN_ONCE(1, "display not currently tiled in async plane flip\n"); + ret = -EINVAL; + goto err_unpin; + } + + cmd |= MI_DISPLAY_FLIP_ASYNC_INDICATOR; + base |= MI_DISPLAY_FLIP_TYPE_ASYNC; + } + ret = intel_ring_begin(ring, 4); if (ret) goto err_unpin; - intel_ring_emit(ring, MI_DISPLAY_FLIP | - MI_DISPLAY_FLIP_PLANE(intel_crtc->plane)); + intel_ring_emit(ring, cmd); intel_ring_emit(ring, fb->pitches[0] | obj->tiling_mode); - intel_ring_emit(ring, i915_gem_obj_ggtt_offset(obj) + intel_crtc->dspaddr_offset); + intel_ring_emit(ring, base); /* Contrary to the suggestions in the documentation, * "Enable Panel Fitter" does not seem to be required when page @@ -9738,7 +9769,7 @@ void intel_modeset_init(struct drm_device *dev) dev->mode_config.max_height = 8192; } - if (IS_GEN7(dev)) + if (IS_GEN6(dev) || IS_GEN7(dev)) dev->mode_config.async_page_flip = true; dev->mode_config.fb_base = dev_priv->gtt.mappable_base;